Leading validation projects from start to finish - bringing up overall coverage plan during post-silicon phase, planning development timeline, planning and implementing test development before silicon availability, taking overall responsibility and accountability for validation flow execution and analysis, driving issues to closure along with relevant team members.
Design novel test algorithms and develop test programs for validating and characterizing NAND features, commands, timings and currents
Characterization, debug, and validation of NAND according to the data sheet specification and in customer s designs and systems
Partnering with product engineering, manufacturing, marketing, tester vendors, design engineering and RWB teams
Developing NAND validation and characterization programs and using those programs to debug advanced NAND designs and features.
Use high-speed tester hardware to perform functional and design validation of new NAND devices
Analyzing large data sets on NAND characteristics, proving design margin and functionality.
Apply engineering bench and testers to perform device characterization and electrical failure analysis
Successful candidates for this position will demonstrate:
Keen interest in design validation
For Senior Engineer role, 2-6 years and above experience in NAND related product and/or test program development. For principal engineer role, 10 years and above experience in NAND validation.
Strong organization, planning and prioritization skills.
Strong knowledge of semiconductor device physics, characterization techniques and equipment.
Excellent problem solving and analytical skills.
Software development proficiency (e.g. C-based programming) and scripting (e.g. Perl, Python)
Effective communication skills in written and spoken English
Simulation software know-how (e.g. Verilog, Synopsis VCS) is a plus