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49 Maxim Integrated Jobs

Staff DFT Engineer

10-12 years

Bangalore / Bengaluru

1 vacancy

Staff DFT Engineer

Maxim Integrated

posted 2mon ago

Job Role Insights

Flexible timing

Job Description

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today s innovators stay Ahead of What s Possible.
Essential Duties and Responsibilities:
  • Ownership of developing the specification and architecture of DFT for the SOC.
  • Lead end to end SoC DFT Activities
  • Collaborate with other disciplines and define the DFT requirements and Architecture.
  • Deliver the DFT STA constraint to Physical Design team and ensure the timing closure of the DFT logic.
  • Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability.
  • Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules.
  • MBIST Design (including repair) and Verification using Siemen s EDA tool.
  • Validation of DFT structures/patterns in RTL, Netlist with and without SDF.
  • Work closely with the verification team to define and implement DFT verification plans.
  • Analyze and debug test failures and collaborate with the test engineering team to resolve issues.
  • SPYGLASS for DFT.
  • Support post silicon debug activities
Qualifications:
  • Minimum BTech/BE degree in Electrical/Electronics.
  • 10+ years of solid DFT experience in hands-on and/or technical leadership..
  • Strong knowledge of LBIST, ATPG, DFT DRC, Scan compression, Low power DFT Techniques, MBIST, Boundary Scan, Analog DFT, JTAG Architecture, DFT STA Constraint development.
  • Hand-on experience/expertise in Cadence/Siemen s DFT EDA tools for Scan stitching, DRC, ATPG, Coverage improvement, MBIST, Boundary Scan.
  • Proficiency in scripting languages such as Perl, Tcl, and/or Python for automation.
  • Good interpersonal, teamwork and communication skills to logically drive the discussions effectively with teams spread geographically.

Employment Type: Full Time, Permanent

Functional Areas: IT Hardware & Telecom

Read full job description

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Flexible timing
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Maxim Integrated Benefits

Health Insurance
Cafeteria
Work From Home
Team Outings
Soft Skill Training
Free Transport +6 more
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