Engineer & Sr Engineer: Post Silicon Validation

Dear Applicant,

We, Cyient is hiring for Engineer & Sr Engineer: Silicon Validation: Analog Peripherals/ PMIC: Bench Validation & Characterization ( End to End Offshore-Onshore Model based Global Product Solution from Scratch).

Experience Range: 2-7 Years
Base Location: Bangalore.

Key SKills:

1. As a Sr Engineer, we are looking for specialized resources in Advanced Analog: Bench Validation & Characterization.
2. Must have strong bench characterization of analog IPs such as ADC, DAC, LDO, Thermal Sensor, CMPSS, Bandgap, Oscillator
7. Must have worked on pre-Si SoC level validation of digital interfaces for analog IPs: ADC, DAC, CMPSS, TSENSE
8. Must have understanding of end-equipment and use-case of Resolver IP, working on demo setup for the same
9. Will be responsible for characterization of PLL, Thermal Sensor, OTP, GPIO, MTBF, PMB, RO, Oscillator, Filter, BBGEN
10. Must have understanding of VIL/VIH, VOL/VOH, Rise-time, Fall-time, Propagation-Delay, Jitter, Phase Noise, PSRR, Lock-Time etc.
11. Should have created automations using LabVIEW, VB, Python
12. Must have knowledge of block level design of analog IPs
13. Must have created setup for PLL, TSense, BBGEN, OTP

Interested Applicants, Kindly share updated CV & availability slots to rajanikant.sharma@cyient.com for detailed discussion.

Best Regards
Rajani Kant Sharma
Sr Recruiter: Semiconductor Vertical
Cyient