Lead Verification Engineer

B. Tech/M. Tech (EE) - will good knowledge of Digital Logic Systems / Timing Analysis etc
Ability to correlate failures with code checkins and triage failures quickly
Good Knowledge of Verilog and System verilog is desirable .
Good Analytical and Problem solving Skills .
Capability to write scripts in bash/tcl/perl/python
Familarity with UNIX is a plus , so is knowledge of LSF / SGE/ NC or any other compute farm.
Knowledge of emulation and prototyping technologies is a plus .