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Premium Employer

Advanced Micro Devices

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3.8

based on 246 Reviews

209 Advanced Micro Devices Jobs

RTL/IP Design - MTS

Advanced Micro Devices, Inc

3.8

based on 246 Reviews

8-12 years

Hyderabad / Secunderabad

1 vacancy

RTL/IP Design - MTS

Advanced Micro Devices

posted 2mon ago

Job Role Insights

Flexible timing

Key skills for the job

Python Social Work Recruitment Gaming Front End Basic

+ 4 more

Job Description

The Core design team is responsible for development of High performance and Ultralow power x86 microprocessor core . The role provides a unique opportunity to work at the micro-architectural level of the next-gen Core, with exposure to designs that defines the next wave of client (laptops / ultra-books / think-clients / server) and custom designs. The multi-billion gate complexity and high-frequency (GHz) design development gives the learning experience of the latest and greatest design and verification methodologies, using cutting edge advanced technology nodes.

KEY RESPONSIBILITIES:

RTL design of high performance x86-core ISA features, clock/reset/power features of processor, IP Integration, sub-system level design
Design of x86 Core microarchitecture features, power management features, cache, coherency.
Design optimization for implementing power efficient IP, implementing the RTL using low power techniques
Responsible for the inter IP integration issues resolution
Own the Clock-Domain crossing, Linting aspects of the overall design of the IP and the subsystem.
Work closely with DFT, Physical Design and SOC teams to incorporate the interdisciplinary feedback into the design
Micro-architecting and documentation of the design features
Mentor the junior members of the RTL team to meet the team goals
Your commitment to innovating as a team member demonstrated through excellent communication, knowledge of proper documentation techniques, and independently driving tasks to completion.

PREFERRED EXPERIENCE:

8 to 12 years of experience in Digital IP/ASIC design and Verilog RTL development
Experience in full IP design cycle, requirements definition, architecture and microarchitecture specification.
Should be we'll versed with RTL design verification, design quality checks, synthesis, timing closure and post silicon validation.
Expert on Verilog RTL design and has experience of multiscale digital IP/ASIC projects.
Should possess expertise in front-end EDA tools sign-off and its flows.
Familiarity with low power design and low power flow is an added plus.
Ability to program with scripting languages such as Python or Perl is a plus;
Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements;
Proven interpersonal skills, leadership and teamwork;
Excellent writing skills in the English language, editing and organizational skills required;
Skilled at prioritization and multi-tasking;
Good understanding of engineering terminology used within the semiconductor industry;
Good understanding of digital design concepts;
Knowledge of, or experience in, functional design verification or design is highly desired.