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Premium Employer

Advanced Micro Devices

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3.8

based on 246 Reviews

209 Advanced Micro Devices Jobs

MTS Silicon Design Engineer

Advanced Micro Devices, Inc

3.8

based on 246 Reviews

8-13 years

Hyderabad / Secunderabad

1 vacancy

MTS Silicon Design Engineer

Advanced Micro Devices

posted 16hr ago

Job Role Insights

Flexible timing

Key skills for the job

Electrical Engineering Social Work C++ Analytical Chemistry Perl Digital Design

+ 4 more

Job Description

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD s CSoC DV, resulting in no bugs in the final design.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Responsible for participating in the pre-silicon verification for full chip, blocks, multi-chip and
system-level verification
Specifying design verification plan at soc level/IP level
Specifying or reviewing verification plans for complex blocks within the ASIC
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
Review functional and code coverage metrics modify or add tests or constrain random tests to meet the coverage requirements
Responsible for developing complex verification environment using the latest coverage/assertions based verification design methodology, which includes :
o self-checking, reusable, automated verification environment : both at full-chip & block level
o Constrained random generators and reference models

PREFERRED EXPERIENCE:

B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering
Minimum 8+ years of experience in ASIC Design Verification
Must have excellent knowledge of ASIC Design Flow and SOC architecture
Experience in developing complex testbench/model in verilog, System verilog or SystemC
Experience with coverage-based verification methodology
Experience in writing testplans and testcases
Excellent debug skills in functional simulations are must.
Experience in random test generation, coverage analysis, failure debug
Strong Verilog, SystemVerilog, PLI interface, C/C++, Perl/Shell scripts programming skills.
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
Must have good communication skills and the ability/desire to foster a team environment.
Experience in PCIE and USB protocols verification
Experience in low power concepts/verification (NLP/UPF) and emulation is good-to-have
Exposure to leadership or mentorship is an asset