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I applied via LinkedIn and was interviewed in Jun 2023. There were 2 interview rounds.
Analysis of code and review the parameters of association
No, I do not have any backlogs or suspensions.
I do not have any backlogs or suspensions in my work history.
I have consistently met deadlines and quality standards in my previous roles.
I have never been suspended or faced any disciplinary actions in my career.
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I applied via Referral and was interviewed before Dec 2020. There were 3 interview rounds.
posted on 13 Aug 2024
3 rounds online, dsa, hr
posted on 22 Aug 2024
I applied via Campus Placement and was interviewed in Feb 2024. There were 3 interview rounds.
It was online coding test consist of 2 question
One from DP and other graph
One question of DP within in 45 min time constraints
Floor value of square root of a number is the largest integer less than or equal to the square root.
The floor value of square root of a number can be found using mathematical functions like floor() or integer division.
For example, the floor value of square root of 16 is 4, as sqrt(16) = 4.
For non-perfect square numbers, the floor value of square root can be calculated using approximation methods.
posted on 6 Oct 2023
I applied via Campus Placement and was interviewed in Apr 2023. There were 3 interview rounds.
Level was medium to hard
To print a tree in anticlockwise direction, start from the bottom left and traverse each level from right to left.
Start from the bottom left of the tree
Traverse each level from right to left
Print the nodes as you traverse
Some old coding platform with limited testcases
posted on 20 Nov 2024
I applied via Naukri.com and was interviewed in May 2024. There were 2 interview rounds.
Coding round where they ask few coding questions
2 coding questions, aptitude and electronics
I applied via Campus Placement and was interviewed in Feb 2024. There were 2 interview rounds.
Digital electronics, circuits , verilog , asic design flow
ASIC design flow process involves steps like specification, design, verification, synthesis, and testing.
Specification: Define requirements and constraints for the ASIC design.
Design: Create a high-level design based on the specifications.
Verification: Verify the design using simulations and tests.
Synthesis: Convert the design into a netlist of gates and connections.
Testing: Test the fabricated ASIC to ensure functiona...
Power reduction techniques in CMOS involve various methods to minimize power consumption in CMOS circuits.
Use of power gating to selectively turn off power to unused circuit blocks
Implementing clock gating to disable clock signals to unused circuitry
Utilizing voltage scaling to reduce power consumption at lower voltages
Applying dynamic voltage and frequency scaling to adjust voltage and frequency based on workload
Using...
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