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Smart Chip Executive Interview Questions and Answers
Smart Chip Executive Interview Experiences
1 interview found
Anonymous
(2 Questions)
- Q1. Reason to leave old job
- Q2. Expected salary
Interview Preparation Tips
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Selected
I applied via Recruitment Consulltant and was interviewed before Dec 2023. There were 2 interview rounds.
Interview Preparation Tips
Tarun Kandpal
Selected
I applied via LinkedIn and was interviewed in Aug 2024. There was 1 interview round.
Interview Preparation Tips
Interview Preparation Tips
Experience: Initial Short-listing : CGPA 8 Cut-Off
Round: Test
Experience: Written Test: The test mostly consisted of both aptitude and tech questionsAptitude - Tough. Most questions puzzles, probabilityTech - Easy. Deciding factor. Includes basic digital circuits
Tips: Concentrate on topics like Digital circuits ,Verilog FAQs, ASIC design flowGate Problems and puzzles
Round: Interview
Experience: Technical round is around 90 minutes.Technical round consisted of questions from topics such as Wireless communication -fading, multipath, OFDMSignal processing – DFT, Detection and Estimation - MMSE, linear MMSE, detection of symbols, Probability - Bertrand's Paradox
Round: Interview
Experience: HR Round is around 30 minutes. Basic HR questions.
College Name: IIT Madras
Interview Questionnaire
4 Questions
- Q1. What do you know about Broadcom?
- Ans.
Broadcom is a global technology company that designs, develops, and supplies semiconductor and infrastructure software solutions.
Broadcom is headquartered in San Jose, California.
The company was founded in 1991.
Broadcom's products are used in various industries, including networking, storage, broadband, wireless, and industrial.
Some of Broadcom's notable products include Wi-Fi chips, Bluetooth chips, and Ethernet switc...
- Q2. Why Broadcom?
- Ans.
Broadcom is a leading technology company with a strong reputation for innovation and growth.
Broadcom has a diverse portfolio of products and services that align with my interests and skills.
Broadcom has a strong track record of success and growth, which provides opportunities for career advancement.
Broadcom values its employees and fosters a culture of collaboration and innovation.
Broadcom is a leader in the industry a...
- Q3. Skills, strengths, weakness etc
- Q4. Plan for higher education?
- Ans.
Planning to pursue a master's degree in engineering.
Researching universities with strong engineering programs
Preparing for standardized tests like GRE
Networking with alumni and professionals in the field
Applying for scholarships and financial aid
Considering online or part-time programs for flexibility
Interview Preparation Tips
Experience: I had a CGPA of 10/10. There was a cut-off of 8 CGPA to apply for the job.
Round: Test
Experience: It was a written test. They mainly asked Quant/general ability puzzles and Tech questions.
Tips: I mainly concentrated on the following topics :
Combinatorics and probability.
Discrete mathematics.
Markov chains.
Pigeon hole principle.
Signal processing.
Sampling theorem.
Estimation theory.
Duration: 90 minutes
Round: Technical Interview
Experience: There were two rounds of interview . Each of 2hrs 20 min.
My subject knowledge was mainly tested on ::Wireless communication - fading, multipath, OFDM,Signal processing - DFT
Detection and Estimation - MMSE, linear MMSE, detection of symbols
Probability - Bertrand's Paradox
Tips: I mostly prepared for the interview by studying the class notes well.
Round: HR Interview
Experience: The interview was mainly based on the courses that I had credited in the previous semesters. I got selected because of my performance in written test and also in the technical interview. I topped the written test. I impressed them during the interview by answering 95% of the questions.
Skill Tips: I prepared for placements by video lectures, solving puzzles etc. I started my preparation in August
College Name: IIT Madras
Interview Questionnaire
2 Questions
- Q1. About the company
- Q2. About ASIC design Flow
Interview Preparation Tips
Experience: I had a CGPA of 9.18/10 and the cutoff was 8/10.
Round: Test
Experience: The test had two Sections:
1. Aptitude - (Very Tough. Most questions were puzzles, probability)
2. Tech - (Very Easy. Deciding factor). Includes basic digital circuits
Tips: I prepared Digital Circuits Basics for Technical round.
Round: Technical Interview
Experience: The interview was of 1h 30 min. All common digital circuit questions were asked
General Tips: Start 1 month ahead. For aptitude and tech prepare Verilog FAQs and ASIC design flow(mainly for core companies.)
Skill Tips: I think I got selected because of my project and Interview performance.
Skills: Digital Verification, CAD for VLSI, Digital IC design
College Name: IIT Madras
velisetti Raviteja
I applied via Campus Placement and was interviewed in Dec 2016. There were 4 interview rounds.
Interview Questionnaire
1 Question
- Q1. Design 2 to 1 mux and project details
- Ans.
A 2 to 1 mux can be designed using logic gates or multiplexer ICs.
A 2 to 1 mux has 2 inputs and 1 output.
It selects one of the inputs based on the value of the select input.
The truth table for a 2 to 1 mux can be used to design the circuit.
Multiplexer ICs like 74HC153 can be used to implement the design.
The output of the mux can be connected to a logic gate or another mux for further processing.
Interview Preparation Tips
Experience: All are aptitude questions. Most of them are permutations and combinations questions.
Tips: Prepare aptitude well.
Duration: 1 hour
Total Questions: 25
Round: Technical Interview
Experience: They asked very simple questions. I was asked to design 1 serilizer 4 data lines to 1.They asked 1 aptitude question.
Tips: Prepare basic digital circuits such as mux, demux, decoder etc.
College Name: IIT Madras
I appeared for an interview before Jul 2021.
Interview Preparation Tips
Interview Questionnaire
4 Questions
- Q1. Implement the following code using gates(MUX and multiplier) If(A): F = D*E Else: F = G*H
- Ans.
Implement code using MUX and multiplier gates for conditional assignment
Use a 2:1 MUX to select between D*E and G*H based on A
Use a multiplier gate to calculate D*E and G*H
Connect the output of the MUX to the input of the multiplier gate
Ensure proper sizing of gates to meet design requirements
- Q2. Draw State diagram to find a pattern 1011.Important to ask: If overlap is allowed.If there are 1000 states, we represent using 10 bits. If ‘P’ power is consumed when the system moves from State 0 to State ...
- Q3. Timing analysis of Sequential and combinational logic: Definition of Setup time. How does it affect the system. Find the minimum clock frequency given Tcq, delay of all the gates, Tsu, Thold
- Ans.
Setup time is the minimum time required for the input signal to be stable before the clock edge arrives.
Setup time is a critical parameter in timing analysis of sequential and combinational logic.
It affects the system by ensuring that the input signal is stable before the clock edge arrives, preventing errors in the output.
The minimum clock frequency can be calculated using the formula: Fmin = 1 / (Tcq + Tsu + Thold), ...
- Q4. Due to some other type of fabrication, if clock frequency happened to be more than whatit is supposed to be(the one calculated above), how do you handle that situation?
Interview Preparation Tips
Experience: Shortlisted 8 students from resumes for interview.
Parameters for shortlisting (at each stage of process):Varied ResumeAny work done in FGPACG - I had CGPA of 8.66Internship - Was an Intern at QualcommProjects - Digital IC Design-used Standard Cell Design,Wireless-OFDMsynchronization and channel estimation,Automatic speech recognition)
Round: Technical Interview
Experience: Only 1 round of interview was taken.No HR round and only Technical Questions were asked.
Basics in our courses(state diagrams etc.) were tested.Concepts were explained and was asked questions. So, skill ofgrasping and applying were also testedSpeed didn’t matter. How aproblem was approached,thought were testedNo knowledge regarding minors/electives tested.
For Core:No courses/electives looked at(as nothing related to FPGA is taught)Nothing related to BTP/DDP
Tips: Good skills of maths might help.
In the interview, in 2nd question which was mentioned, whether repetition isallowed or not was asked by the candidate.This really mattered as that was theonly thing different he has done from the person who did an intern in FPGA andit might helped in getting selected finally :)
Skills: Grasping Power, Approaching a Problem, Thought Process, Math Skills, C++, C, Python, Matlab, Networks, Digital Signal Processing, Data Structures , Digital Systems, Algorithms
College Name: IIT MADRAS
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