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I applied via Walk-in and was interviewed in Jul 2024. There were 4 interview rounds.
Fundamental knowledge of aptitude, MPMC, C/C++, basic electronics, and digital electronics.
Polymorphism in SystemVerilog allows objects of different types to be treated as objects of a common base type.
Polymorphism allows for more flexibility and reusability in code
It enables the use of virtual methods to be overridden in derived classes
Example: Using a base class to define common methods and then creating derived classes that implement those methods differently
Inheritance in SystemVerilog allows a class to inherit properties and methods from another class.
Inheritance allows for code reusability and promotes a hierarchical structure.
Derived class inherits properties and methods from the base class.
Derived class can also have its own unique properties and methods.
Example: class B extends class A, where B inherits properties and methods from A.
I applied via Job Portal and was interviewed in Feb 2024. There were 3 interview rounds.
Normal genral aptitude questions are there
1.speed and time
2.permutation combination
3.percentage
4.profit loss
etc
Xor gate can be designed using 4:1 mux by selecting inputs based on control signals.
Use 4:1 mux with two inputs as A and B, one input as A' and one input as B'.
Connect A and B to select lines of mux.
Connect A' and B' to the data inputs of mux.
Set control signals such that when A=0, B=1 or A=1, B=0, the output is 1.
When A=B=0 or A=B=1, the output should be 0.
A full adder can be designed using two half adders and an OR gate.
Use one half adder to add two of the three inputs (A and B)
Use the second half adder to add the output of the first half adder with the third input (Cin)
Use an OR gate to combine the carry outputs of both half adders to get the final carry out
The sum output is the XOR of the outputs of both half adders
I am a passionate and experienced Design Engineer with a strong background in mechanical engineering and a proven track record of delivering innovative solutions.
I have a Bachelor's degree in Mechanical Engineering from XYZ University.
I have worked for XYZ Company for 5 years, where I led a team in designing a new product that increased efficiency by 20%.
I am proficient in CAD software such as SolidWorks and AutoCAD.
I ...
My hobbies include woodworking, hiking, and playing the guitar.
Woodworking: I enjoy creating furniture and small projects in my spare time.
Hiking: I love exploring nature trails and challenging myself with new hikes.
Playing the guitar: I find relaxation and creativity in playing music on my guitar.
I applied via Campus Placement and was interviewed before Aug 2022. There were 3 interview rounds.
Tasks are concurrent blocks of code that can run in parallel, while functions are sequential blocks of code that perform a specific task.
Tasks can run concurrently, while functions run sequentially
Tasks can be executed in parallel, while functions are executed one after the other
Tasks are used for parallel processing, while functions are used for sequential processing
Blocking operations wait until the operation completes, while non-blocking operations do not wait and allow other operations to continue.
Blocking operations halt the execution until the operation is completed
Non-blocking operations do not halt the execution and allow other operations to continue
Blocking operations are synchronous, while non-blocking operations are asynchronous
Example: In a blocking operation, a functio...
FSM code for pattern detector
Define states for different patterns to detect
Transition between states based on input pattern
Output a signal when a specific pattern is detected
Scaledge interview questions for popular designations
I applied via LinkedIn and was interviewed before Feb 2022. There were 3 interview rounds.
VERILOG, SV, SVA, UVM architecture, protocol, anything that is present in your resume, related to Asic Verification.
Scoreboard is a verification component that tracks and compares expected and actual data.
Scoreboard is used to monitor the progress of a design under test (DUT) and compare it with the expected behavior.
It can be implemented using a register or a memory block.
Scoreboard can be used to check the correctness of the DUT's output against the expected output.
Expected data can be obtained from a reference model or a golden m...
UVM can be used to create a testbench environment and integrate it with c based test cases using DPI-C.
Create a UVM testbench environment using SystemVerilog
Use DPI-C to integrate the c based test cases with the UVM environment
Define a DPI import function in SystemVerilog to call the c functions
Use UVM sequences to drive the test cases
Use UVM scoreboard to verify the results
Use UVM coverage to ensure complete coverage
I applied via Company Website and was interviewed in Aug 2023. There was 1 interview round.
DRAM is volatile memory that stores data temporarily, while SRAM is faster and more expensive but retains data as long as power is supplied.
DRAM stands for Dynamic Random Access Memory, while SRAM stands for Static Random Access Memory.
DRAM requires refreshing to retain data, while SRAM does not.
DRAM is slower and less expensive than SRAM.
Examples of DRAM include DDR3 and DDR4, while examples of SRAM include L1, L2, an
I applied via Recruitment Consulltant and was interviewed in Nov 2022. There were 2 interview rounds.
Testcases for software and hardware
For software: unit testing, integration testing, system testing, acceptance testing
For hardware: functional testing, performance testing, stress testing, environmental testing
Testcases should cover all possible scenarios and edge cases
Testcases should be repeatable and automated where possible
Firmware is a software program that controls hardware devices. Yes, I have done hardware testing. Our product is sustainable.
Firmware is a type of software that is embedded in hardware devices to control their functionality.
I have experience in testing hardware components such as circuit boards, processors, and memory modules.
Our product is designed with sustainability in mind, using eco-friendly materials and energy-e
I applied via Approached by Company and was interviewed in Jan 2024. There was 1 interview round.
To start a sequence, you need to define the sequence type, specify the starting value, and set the increment or decrement value.
Define the sequence type: arithmetic, geometric, or custom
Specify the starting value of the sequence
Set the increment or decrement value for arithmetic or geometric sequences
For custom sequences, define the sequence pattern or rule
Examples: Arithmetic sequence starting from 1 with an increment...
I was interviewed before Feb 2016.
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