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posted on 5 Dec 2017
I applied via Campus Placement and was interviewed in Dec 2017. There was 0 interview round.
posted on 22 Apr 2021
I applied via Naukri.com and was interviewed in Oct 2020. There were 4 interview rounds.
posted on 14 Jan 2022
I applied via Referral and was interviewed before Jan 2021. There were 3 interview rounds.
I applied via Naukri.com and was interviewed before Aug 2021. There were 2 interview rounds.
posted on 13 Jan 2024
I applied via Referral and was interviewed before Jan 2023. There were 2 interview rounds.
Ap per your job profile
posted on 11 Jun 2022
PPAP documents are developed in the Production Part Approval Process (PPAP) face.
PPAP documents are developed during the production part approval process.
This is typically the fourth phase of the APQP (Advanced Product Quality Planning) process.
PPAP documents include items such as control plans, FMEAs, and measurement system analysis.
The purpose of PPAP is to ensure that all parts meet customer requirements and specifi...
The shrinkage value of pa66 varies depending on the specific grade and processing conditions.
Shrinkage is the reduction in size of a molded part as it cools and solidifies.
The shrinkage value of pa66 can range from 1.5% to 3.5%.
Factors that affect shrinkage include mold design, processing parameters, and part geometry.
It is important to account for shrinkage when designing molds and parts to ensure proper fit and funct
Digital circuit design in Verilog including adders, mux, counter, FSM, RAM RTL code, datatypes, and blocking/non-blocking assignments.
Verilog is a hardware description language used for digital circuit design.
Adders are used for arithmetic operations, mux for data selection, counter for counting, and FSM for control logic.
Blocking assignments are executed sequentially, while non-blocking assignments are executed concur...
I applied via Walk-in and was interviewed in Jun 2023. There were 3 interview rounds.
Latch is level triggered, while flip-flop is edge triggered. Latch is asynchronous, while flip-flop is synchronous.
Latch stores data as long as the enable signal is high, while flip-flop stores data only on the rising or falling edge of the clock signal.
Latch is level triggered, meaning it changes output whenever the input changes, while flip-flop is edge triggered, changing output only on clock signal edges.
Latch is a...
VLSI stands for Very Large Scale Integration. It involves designing and fabricating integrated circuits with millions of transistors on a single chip.
VLSI involves the design and fabrication of integrated circuits with millions of transistors on a single chip
It is a field within electronic engineering that deals with the miniaturization of circuits to increase functionality and performance
VLSI design involves creating ...
VLSI Design Methodologies using Verilog HDL
I applied via LinkedIn and was interviewed in Jul 2024. There were 4 interview rounds.
Previous work clarity is essential for successful collaboration and understanding of project requirements.
Clearly explain the projects you have worked on in the past, including your role and responsibilities
Provide examples of how you communicated with team members to ensure clarity in project goals
Discuss any challenges you faced in previous projects and how you overcame them
Bit manipulation, memory layout, interrupts, semaphore mutex, implement memcpy, sorting, algo to share resource equally
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Lead Application Engineer
3
salaries
| ₹5 L/yr - ₹6 L/yr |
Intel
TDK India Private Limited
Synopsys
ILJIN ELECTRONICS