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Mirafra Technologies Hardware Engineer Interview Questions and Answers

Updated 13 Nov 2024

Mirafra Technologies Hardware Engineer Interview Experiences

1 interview found

Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. About rf testing and designing
  • Q2. Hardware tools knowlwdge
Round 2 - HR 

(2 Questions)

  • Q1. Relocation to client
  • Ans. 

    I am open to relocating to the client's location if required.

    • I am willing to relocate for the right opportunity

    • I understand the importance of being on-site for certain projects

    • I have previous experience relocating for work, such as when I moved for my last job

  • Answered by AI
  • Q2. CTC negotiations

Interview questions from similar companies

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
No response

I applied via LinkedIn and was interviewed in Jul 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. What kind FPGAs used, tell me difference
  • Ans. 

    FPGAs are Field-Programmable Gate Arrays used in hardware design. They can be categorized as SRAM-based, Flash-based, or Antifuse-based.

    • SRAM-based FPGAs are volatile and require reprogramming every time they power up. Examples include Xilinx Virtex series.

    • Flash-based FPGAs are non-volatile and retain their configuration even when powered off. Examples include Actel ProASIC3 series.

    • Antifuse-based FPGAs are OTP (One-Time...

  • Answered by AI
  • Q2. Calculation of Decoupling analysis
  • Ans. 

    Decoupling analysis involves calculating the required capacitance to maintain stable voltage levels in a circuit.

    • Decoupling analysis is essential for ensuring stable power supply in electronic circuits.

    • It involves calculating the amount of capacitance needed to filter out noise and maintain voltage levels.

    • Decoupling capacitors are placed strategically in a circuit to provide this filtering effect.

    • The formula for calcul...

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare based on company where you are applying

Skills evaluated in this interview

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via campus placement at Netaji Subhas Institute of Technology (NSIT) and was interviewed in Jun 2024. There were 2 interview rounds.

Round 1 - Aptitude Test 

Basic ece ques and apti

Round 2 - Technical 

(2 Questions)

  • Q1. What are flip flops and latches
  • Ans. 

    Flip flops and latches are sequential logic circuits used in digital electronics to store and transfer data.

    • Flip flops are clocked circuits that store one bit of data, while latches are level-sensitive circuits that store data as long as the enable signal is active.

    • Flip flops are edge-triggered, meaning they change state on a clock edge, while latches are level-triggered, changing state as long as the enable signal is ...

  • Answered by AI
  • Q2. Verilog projects

Interview Preparation Tips

Interview preparation tips for other job seekers - prepare well gate sub digital and verilog
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Aptitude Test 

Was asked details of scanning electron microscopy

Interview Preparation Tips

Interview preparation tips for other job seekers - Have good basis of optical and scanning electron microscopes
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Aptitude Test 

Aptitude, Digital Electronics.

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
-

I applied via Referral and was interviewed before Feb 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

Questions on basic electronics

Round 2 - Technical 

(1 Question)

  • Q1. About digital electronics power electronics
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
No response

I applied via LinkedIn and was interviewed in Jul 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. What kind FPGAs used, tell me difference
  • Ans. 

    FPGAs are Field-Programmable Gate Arrays used in hardware design. They can be categorized as SRAM-based, Flash-based, or Antifuse-based.

    • SRAM-based FPGAs are volatile and require reprogramming every time they power up. Examples include Xilinx Virtex series.

    • Flash-based FPGAs are non-volatile and retain their configuration even when powered off. Examples include Actel ProASIC3 series.

    • Antifuse-based FPGAs are OTP (One-Time...

  • Answered by AI
  • Q2. Calculation of Decoupling analysis
  • Ans. 

    Decoupling analysis involves calculating the required capacitance to maintain stable voltage levels in a circuit.

    • Decoupling analysis is essential for ensuring stable power supply in electronic circuits.

    • It involves calculating the amount of capacitance needed to filter out noise and maintain voltage levels.

    • Decoupling capacitors are placed strategically in a circuit to provide this filtering effect.

    • The formula for calcul...

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare based on company where you are applying

Skills evaluated in this interview

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed before Apr 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

Digital Electronics, CMOS, Aptitude, C programming

Round 2 - Technical 

(1 Question)

  • Q1. Verilog, VLSI Design Flow, CMOS basics
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Aptitude Test 

Was asked details of scanning electron microscopy

Interview Preparation Tips

Interview preparation tips for other job seekers - Have good basis of optical and scanning electron microscopes
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Aptitude Test 

Aptitude, Digital Electronics.

Mirafra Technologies Interview FAQs

How many rounds are there in Mirafra Technologies Hardware Engineer interview?
Mirafra Technologies interview process usually has 2 rounds. The most common rounds in the Mirafra Technologies interview process are Technical and HR.
How to prepare for Mirafra Technologies Hardware Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Mirafra Technologies. The most common topics and skills that interviewers at Mirafra Technologies expect are PCB Layout and PSpice.
What are the top questions asked in Mirafra Technologies Hardware Engineer interview?

Some of the top questions asked at the Mirafra Technologies Hardware Engineer interview -

  1. relocation to cli...read more
  2. about rf testing and design...read more
  3. hardware tools knowlw...read more

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Mirafra Technologies Hardware Engineer Salary
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₹5.5 L/yr - ₹15 L/yr
39% more than the average Hardware Engineer Salary in India
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