Applied Materials Costing Engineer Interview Questions and Answers

Q1. IV characterstics of CMOS inverter
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IV characteristics of CMOS inverter show the relationship between input voltage and output current.
• CMOS inverter has two transistors - NMOS and PMOS connected in series.

• For low input voltage, NMOS is ON and PMOS is OFF, resulting in low output voltage.

• For high input voltage, NMOS is OFF and PMOS is ON, resulting in high output voltage.

• The transition between low and high output voltage occurs at the threshold voltage.

• Th...read more
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Q2. Set up and hold time explain
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Set up time and hold time are timing requirements in digital circuits to ensure proper operation.
• Set up time is the minimum time before the clock edge that the input signal must be stable.

• Hold time is the minimum time after the clock edge that the input signal must be maintained stable.

• Violating set up time can lead to incorrect data being latched.

• Violating hold time can lead to metastability issues.

• Examples: In a flip...read more
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C, c++ python and simple aptitude

Q1. MOSFET working & types
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Q2. CMOS inverter and it's working
Ans. 
A CMOS inverter is a type of digital logic gate that switches between high and low voltage levels.
• CMOS stands for Complementary Metal-Oxide-Semiconductor

• It consists of a PMOS (p-type metal-oxide-semiconductor) and NMOS (n-type metal-oxide-semiconductor) transistor connected in series

• When the input is high, the PMOS transistor conducts and the output is low

• When the input is low, the NMOS transistor conducts and the outp...read more
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Q1. Behavioral question & hr question
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Q2. Hr discussion & salary discussion
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Q1. Write code of frequency divider
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Q2. Difference between latch & flip flop
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Q1. RLC network and network theory
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Q2. Related to project
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Medium good assesment test

Q1. DSA oops question in detail
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Q2. Array questions
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Q1. Verilog and Digital basic but twisting questions were asked
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Q2. Questions related to flipflop were asked
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