Upload Button Icon Add office photos
filter salariesFilter salaries by

Veinsys Technology Asic RTL Design Engineer salaries in India

Annual salary range
Select experience
₹3.2 Lakhs - ₹4.1 Lakhs
Low Confidence
info icon
Low confidence means that this average salary is based on data that was reported by very few people.
Salary of majority employees
unlock blur
unlock blur

Interested in this particular role?

Last Updated: 6 Mar 2023

Companies similar to Veinsys Technology for Asic RTL Design Engineer

Company name Avg Annual Salary Open Jobs
unlock blur

₹6 L/yr - ₹9.5 L/yr

arrow icon 137% more
Logo
Qualcomm Asic RTL Design Engineer Salary

3 - 8 years exp. (4 salaries)

unlock blur

₹19 L/yr - ₹66 L/yr

arrow icon 938% more
3 job openings
unlock blur

₹10 L/yr - ₹12.3 L/yr

arrow icon 203% more
unlock blur

₹18 L/yr - ₹24.5 L/yr

arrow icon 502% more
Asic RTL Design Engineer salary at Veinsys Technology ranges between ₹3.2 Lakhs to ₹4.1 Lakhs per year for employees with 3 years of experience. Salary estimates are based on 1 latest salaries received from various employees of Veinsys Technology.

Similar Designation salaries in Veinsys Technology

unlock blur
₹3.8 L/yr - ₹5.2 L/yr
Software Developer Salary
(AmbitionBox Estimate)
unlock blur
₹4.1 L/yr - ₹5.3 L/yr

Tell us how to improve this page.

Veinsys Technology Asic RTL Design Engineer salary in India ranges between ₹3.2 Lakhs to ₹4.1 Lakhs. This is an estimate based on latest salaries received from employees of Veinsys Technology.