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SmartDV Technologies Asic RTL Design Engineer salaries in India

Annual salary range
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₹6 Lakhs - ₹9.5 Lakhs
Salary of majority employees
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12% less than the average Asic RTL Design Engineer Salary in Hardware & Networking Companies for 3 years of experience

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Last Updated: 22 Dec 2024

Companies similar to SmartDV Technologies for Asic RTL Design Engineer

Company name Avg Annual Salary Open Jobs
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Qualcomm Asic RTL Design Engineer Salary

3 - 8 years exp. (4 salaries)

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₹19 L/yr - ₹66 L/yr

arrow icon 339% more
3 job openings
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₹10 L/yr - ₹12.3 L/yr

arrow icon 28% more
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₹18 L/yr - ₹24.5 L/yr

arrow icon 155% more
Asic RTL Design Engineer salary at SmartDV Technologies ranges between ₹6 Lakhs to ₹9.5 Lakhs per year for employees with 3 years of experience. Salary estimates are based on 7 latest salaries received from various employees of SmartDV Technologies.

Latest annual salaries shared by SmartDV Technologies Asic RTL Design Engineer

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Experience wise SmartDV Technologies Asic RTL Design Engineer salaries

Last Updated: 22 Dec 2024

Experience Avg Annual Salary
3 years  (7 salaries)

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₹6 L/yr - ₹9.5 L/yr

Similar Designation salaries in SmartDV Technologies

Software Engineer Salary
(AmbitionBox Estimate)
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₹3.4 L/yr - ₹4.4 L/yr
Senior Software Engineer Salary
(AmbitionBox Estimate)
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₹7 L/yr - ₹9 L/yr
Software Developer Salary
(AmbitionBox Estimate)
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₹11.3 L/yr - ₹14.4 L/yr
Team Lead Salary
(AmbitionBox Estimate)
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₹6.3 L/yr - ₹8 L/yr

Salary related reviews for SmartDV Technologies

Other Department

1.0
  •  posted on 02 Aug 2019

1.0
 for  Salary and Benefits

Likes

We can learn and handle more than one VIP. That's a only thing is a positive here. That also depends upon the employee not about colleague or employer

read more

Dislikes

...h groups. Package wise, it's so less and this employer won't provide hike also. They simply tell some reason and will deduct some amount from your salary. We can't innovate anything here. Management made us to work for 16*7. They make employee so trouble while they releive. They aren't deducting PF. There is no additional benefits, team outings. I haven't heard about team lunch in this company.

read more

Research & Development Department

2.0
  •  posted on 04 Oct 2018

2.0
 for  Salary and Benefits

Likes

Good opportunity to learn. Excellent in satisfying the Customers.

Dislikes

-- no work life balance. -- No appreciation for your work. -- Too much work pressure. -- No week off, need to work on Saturday and even on Sunday sometimes. -- only 10casual and 5 sick leaves are provided. -- no facilities provided while working over night. -- no job security. -- Need to work minimum of 12 to 13 hrs a day. -- So many annoying internal rules and regulations. -- No team outings, only thing present there is work, work and work.

read more

Research & Development Department

5.0
  •  posted on 28 Dec 2018

1.0
 for  Salary and Benefits

Likes

Good environment for freshers and good helping teammates. Very good skill development and learning opportunities.

Dislikes

1. Worst management 2. Politics 3. Very bad salary/appraisal 4. 24 hrs work for every team

see more salary related reviews

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SmartDV Technologies Asic RTL Design Engineer Salary FAQs

What is the salary of Asic RTL Design Engineer at SmartDV Technologies?
Asic RTL Design Engineer salary at SmartDV Technologies in India ranges between ₹6.0 Lakhs to ₹9.5 Lakhs for 3 years of experience. According to our estimates it is 12% less than the average Asic RTL Design Engineer Salary in India. Salary estimates are based on 7 latest salaries received from various employees of SmartDV Technologies India.
How does the salary of a Asic RTL Design Engineer at SmartDV Technologies India compare with the average salary range for this job?
The average salary of a Asic RTL Design Engineer at SmartDV Technologies is 12% less than the average salary of a Asic RTL Design Engineer in India. To know exact salary insights, login to view.
Which similar companies are paying more than SmartDV Technologies to a Asic RTL Design Engineer in India?
  • Qualcomm Asic RTL Design Engineer Salary - ₹19.0 Lakhs to ₹66.0 Lakhs per year
  • Mobiveil Technologies India Asic RTL Design Engineer Salary - ₹18.0 Lakhs to ₹24.5 Lakhs per year
  • Cerium Systems Asic RTL Design Engineer Salary - ₹10.0 Lakhs to ₹12.3 Lakhs per year
What is the estimated take home salary of a Asic RTL Design Engineer at SmartDV Technologies in India?
The estimated take-home salary of a Asic RTL Design Engineer at SmartDV Technologies ranges between ₹64,110 per month to ₹65,743 per month in India. The take-home salary calculation is based on the average SmartDV Technologies Asic RTL Design Engineer salary in India which ranges between ₹6.0 Lakhs to ₹9.5 Lakhs per year for employees with 3 years of experience. Check how did we calculate take home salary?
What is the notice period for Asic RTL Design Engineer at SmartDV Technologies?
According to AmbitionBox, 44% of the SmartDV Technologies Asic RTL Design Engineers reported a notice period of 1 Month, 34% reported a notice period of 3 Months and the remaining reported other notice period durations. This is based on 9 responses on AmbitionBox in last 2 years.

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SmartDV Technologies Asic RTL Design Engineer salary in India ranges between ₹6 Lakhs to ₹9.5 Lakhs with an average annual salary of ₹unlock blur. Salary estimates are based on 7 SmartDV Technologies latest salaries received from various employees of SmartDV Technologies.