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Sandeepani School of VLSI Design Asic Design Verification Engineer salaries in India

Annual salary range
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₹4.5 Lakhs - ₹5.8 Lakhs
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Last Updated: 12 Mar 2023

Companies similar to Sandeepani School of VLSI Design for Asic Design Verification Engineer

Company name Avg Annual Salary Open Jobs
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₹4 L/yr - ₹10.9 L/yr

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1 job opening
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Asic Design Verification Engineer salary at Sandeepani School of VLSI Design ranges between ₹4.5 Lakhs to ₹5.8 Lakhs per year for employees with less than 1 year of experience. Salary estimates are based on 1 latest salaries received from various employees of Sandeepani School of VLSI Design.

Similar Designation salaries in Sandeepani School of VLSI Design

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₹2.7 L/yr - ₹3.5 L/yr
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₹1.1 L/yr - ₹1.4 L/yr

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Sandeepani School of VLSI Design Asic Design Verification Engineer salary in India ranges between ₹4.5 Lakhs to ₹5.8 Lakhs. This is an estimate based on latest salaries received from employees of Sandeepani School of VLSI Design.