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PrimeSoc Technologies Design & Verification Engineer salaries in Bangalore / Bengaluru

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₹2.7 Lakhs - ₹3.5 Lakhs
Low Confidence
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Low confidence means that this average salary is based on data that was reported by very few people.
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Last Updated: 10 Oct 2024

Companies similar to PrimeSoc Technologies for Design & Verification Engineer in Bangalore / Bengaluru

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PrimeSoc Technologies Design & Verification Engineer Salary

1 year exp. (AmbitionBox Estimate)

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₹2.7 L/yr - ₹3.5 L/yr

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Company name Avg Annual Salary Open Jobs
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TCS Design & Verification Engineer Salary

2 - 3 years exp. (4 salaries)

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₹4 L/yr - ₹5.3 L/yr

arrow icon 71% more
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Wipro Design & Verification Engineer Salary

1 - 5 years exp. (47 salaries)

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₹3.8 L/yr - ₹10 L/yr

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₹4.5 L/yr - ₹6.5 L/yr

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₹3.5 L/yr - ₹10.4 L/yr

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₹4 L/yr - ₹8 L/yr

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₹5.8 L/yr - ₹6 L/yr

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₹5 L/yr - ₹5.5 L/yr

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Design & Verification Engineer salary at PrimeSoc Technologies ranges between ₹2.7 Lakhs to ₹3.5 Lakhs per year for employees with 1 year of experience. Salary estimates are based on 1 latest salaries received from various employees of PrimeSoc Technologies.

Salary related reviews for PrimeSoc Technologies

1.0

Rated by 1 employees for salary & benefits

Full Time

 · 

Other Department

1.0
  •  posted on 19 Jan 2025

1.0
 for  Salary and Benefits

Likes

Nothing is like. But it is open source code to edit.

Dislikes

... am to 10 pm working time. If you ask any question jebaselvi will terminate you. You have to work like slave, no respect, no increment, salary decution if worked upto 1 clock also. Simple jebaselvi say your perfomance is not good. How means you have implement test case, driver code, monitor code include complete all those things your performance is not good tell in final word and detection in your salary. Only three person get experience letter from 2019 company is there. If joined in this company life. Note: if I tell fake means you just contact one of worked emplyeee before worked those worst compnay primesoc

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  • Salary - Bad
  • +5 more

Full Time

 · 

Research & Development Department

1.0
  •  posted on 20 Dec 2023

1.0
 for  Salary and Benefits

Likes

No Words to say, they terminated me.

Dislikes

Here no one help to learn, no support, no guidance, no life life balance.They wont tell how to work but you have to work and complete the work. if you not complete work give me mental torture you. compare to market level salary level low but you have to work like 3 years experience person even as freshers. plese dont join waste career, finally they terimated thanking god

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  • Salary - Bad
  • +6 more
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PrimeSoc Technologies Design & Verification Engineer Salary FAQs

What is the notice period for Design & Verification Engineer at PrimeSoc Technologies in Bangalore / Bengaluru?
According to AmbitionBox, 100% of the PrimeSoc Technologies Design & Verification Engineers in Bangalore / Bengaluru reported a notice period of 15 days or less.This is based on 1 response on AmbitionBox in last 2 years.

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PrimeSoc Technologies Design & Verification Engineer salary in Bangalore / Bengaluru ranges between ₹2.7 Lakhs to ₹3.5 Lakhs. This is an estimate based on latest salaries received from employees of PrimeSoc Technologies.