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Open Silicon Research Design & Verification Engineer salaries in Pune

Annual salary range
1 - 3 years exp.
₹12.2 Lakhs - ₹15.6 Lakhs
Low Confidence
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Low confidence means that this average salary is based on data that was reported by very few people.
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Last Updated: 11 Mar 2023

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Open Silicon Research Design & Verification Engineer Salary

1 - 3 years exp. (AmbitionBox Estimate)

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₹12.2 L/yr - ₹15.6 L/yr

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Wipro Design & Verification Engineer Salary

1 - 3 years exp. (9 salaries)

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₹4 L/yr - ₹6.9 L/yr

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Design & Verification Engineer salary at Open Silicon Research ranges between ₹12.2 Lakhs to ₹15.6 Lakhs per year for employees with experience between 1 year to 3 years. Salary estimates are based on 2 latest salaries received from various employees of Open Silicon Research.

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Open Silicon Research Design & Verification Engineer salary in Pune ranges between ₹12.2 Lakhs to ₹15.6 Lakhs. This is an estimate based on latest salaries received from employees of Open Silicon Research.