Cyient Fpga Design and Verification Engineer Salaries by 2 Employees (Updated 2024)

1 - 2 years exp.

₹3.6 Lakhs - ₹4.6 Lakhs

Low Confidence

Salary of majority employees

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Salaries in different departments

Engineering - Software & QA Fpga Design and Verification Engineer Salary 1 year exp. (AmbitionBox Estimate)	₹3.2 L/yr - ₹3.9 L/yr
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Aviation & Aerospace Fpga Design and Verification Engineer Salary 2 years exp. (AmbitionBox Estimate)	₹4.1 L/yr - ₹5 L/yr

Last Updated: 25 Feb 2024

Companies similar to Cyient for Fpga Design and Verification Engineer

Company name	Avg Annual Salary	Open Jobs
L&T Technology Services Fpga Design and Verification Engineer Salary 1 - 4 years exp. (6 salaries)	₹4.1 L/yr - ₹7 L/yr 34% more
Capgemini Fpga Design and Verification Engineer Salary 0 - 2 years exp. (5 salaries)	₹4.1 L/yr - ₹5.2 L/yr 9% more
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Capgemini Engineering Fpga Design and Verification Engineer Salary 1 - 4 years exp. (4 salaries)	₹5 L/yr - ₹7 L/yr 41% more
Samtel Avionics Fpga Design and Verification Engineer Salary 1 - 3 years exp. (3 salaries)	₹5.4 L/yr - ₹6.9 L/yr 46% more
Processor Systems Fpga Design and Verification Engineer Salary 2 - 5 years exp. (3 salaries)	₹4.3 L/yr - ₹6.1 L/yr 25% more

Fpga Design and Verification Engineer salary at Cyient ranges between ₹3.6 Lakhs to ₹4.6 Lakhs per year for employees with experience between 1 year to 2 years. Salary estimates are based on 2 latest salaries received from various employees of Cyient.

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Salary related reviews for Cyient

Senior Software Engineer in Hyderabad / Secunderabad

Full Time

Engineering - Software & QA Department

3.0

• posted on 24 Oct 2024

1.0

for Salary and Benefits

Likes

The only thing I like, they have multiple Projects with different Service Lines (Manufacturing, Design, Health care, Civil, Mechanical, Mining, ETC )

Dislikes

...or long term, because Less salary than other companies,and really low appraisal. There no benefit, no bonus, no diwali gift, and many more thing

Lead Design Engineer in Bangalore / Bengaluru

Full Time

Research & Development Department

2.0

• posted on 04 Oct 2024

2.0

for Salary and Benefits

Likes

None

Dislikes

...e will not find projects within two months. So job security is the main concern. Salary for existing experienced employee is less compared to new hire.

Lead Design Engineer in Bangalore / Bengaluru

Full Time

Research & Development Department

2.0

• posted on 29 Oct 2023

4.0

for Salary and Benefits

Likes

Salary was given well while joining.. One should ask confidently..

Dislikes

...t comes company will force us to relocate.. Poor HR team effort and support.. Salary will be blocked for their IT issue.. I would have stayed in my old company itself than jumping here for good offer..

Senior Software Engineer in Noida

Full Time

Engineering - Software & QA Department

1.0

• posted on 31 Jan 2024

3.0

for Salary and Benefits

Likes

Ontime salary Work life balance Keep it as last option

Dislikes

No job security Company is about to bankrupt. Company is not having projects and putting employees on bench and then termination. If you have 2 offer letter keep Cyient as 2nd and if you have 10 offer letter keep Cyient as 10th option.

Design Engineer in Bangalore / Bengaluru

Full Time

Other Department

3.0

• posted on 10 Aug 2023

2.0

for Salary and Benefits

Likes

Everybody know that you are paid less and nobody wants to listen to you. Everybody is paid less but displays huge profits every year.

Dislikes

Nothing is likely in Cyient, nothing works as per standard in Cyient. Worst company please never join if you are not offered good salary.

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a technical project manager

Deadend

Hi, I'm here to share a part of my journey from the past 12 years in my career, I started from a package of 3.6LPA in 2013 at iGate and due to a few bad decisions on my career and worthless advices from people who are always pessimistic about the industry, I switched two companies and landed in a start-up with 2.4LPA. I worked hard nearly 8-16hrs a day single handed researched, built and managed an entire vertical of a project for 8 years. When the company didn't value my contribution and thought I was too young to become a manager, I had a package of 6LPA and Senior developer in designation. I switched for obvious reasons to a TL role for 12LPA and now at the same company I'm a TPM on the basis of my contribution with 48LPA as a fixed component. I feel outclassed in terms of having a fancy CV with certifications, I feel like CTC has hit a peak with 48LPA being fixed and nearly 40% in Variable. Most companies are hesitant to hire me because of this. What should be my next move?

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Cyient Fpga Design and Verification Engineer Salary FAQs

What is the notice period for Fpga Design and Verification Engineer at Cyient?

According to AmbitionBox, 100% of the Cyient Fpga Design and Verification Engineers reported a notice period of More than 3 months.This is based on 1 response on AmbitionBox in last 2 years.

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Cyient Fpga Design and Verification Engineer Salaries

Cyient Fpga Design and Verification Engineer salary in India ranges between ₹3.6 Lakhs to ₹4.6 Lakhs. This is an estimate based on latest salaries received from employees of Cyient.