Quality and Reliability Engineer
Quality and Reliability Engineer Interview Questions and Answers
Updated 12 Dec 2024
Q1. Draw NAND using CMOS implementation
Ans.
A NAND gate can be implemented using CMOS technology by combining a PMOS and NMOS transistor in series.
Use a PMOS transistor in series with an NMOS transistor to create the logic gate.
Connect the output of the PMOS transistor to the input of the NMOS transistor.
When both inputs are high, the PMOS transistor conducts and the NMOS transistor is off, resulting in a low output.
When either input is low, the corresponding transistor will be off, allowing the other transistor to con...read more
Quality and Reliability Engineer Jobs
Product Quality and Reliability Engineer • 5-10 years
Intel Technology India Pvt Ltd
•
4.2
Bangalore / Bengaluru
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