Senior Physical Design Engineer

✓ 5+ years of hands on experience,P&R from RTL toGDSincluding timing closure andPhysical verification. ✓ Design experience in all aspects of physical design. ✓ Include all aspects of physical design including synthesis, floor planning, place and route, ClockTreeSynthesis,ClockDistribution,extraction,Timingclosure,Power andSignalIntegrity Analysis, Physical Verification, DFM and Tape Out. ✓ Expert knowledge ofSynopsys IC-Compiler and proficient and powerful user ofSynopsys ToolSuite (DC/ICC/Star/PT). ✓ Technologies: 28nm andbelow. ✓ ExperienceinMentorCalibretoolstorunPhysicalverificationand/orinANSYSRedhawktorunIRanalysisisaPlus. ✓ Education: B.Tech/BE/ME/M.Tech ✓ Efficient communication skills to interface with Front End Design team to resolve Design Issues ✓ Experience in Tcl/Tk, PERL, Makefile is a Plus