SoC Validation Engineers

General Summary:

Requirement:

Looking for candidates with 2 to 6 years of work experience.

Interview Details:

1st/2nd March. Invite only hiring drive for shortlisted candidates.

Minimum Qualifications:

Responsibilities

• Design, develop, debug system/IP validation framework to be used in bare-metal and light-weight-RTOS environment for SoC validation
• Understand the SoC architecture, new features and prepare test plan
• Develop/port/enhance system validation content based on system level use cases, low power use cases, find HW bugs and root cause them
• Interface with Design/Software teams for test plan and debugs
• Interface with various IP validation team and cross functional teams(Design/SW) for test plan creation and debug complex issues
• Use silicon debug hooks to measure power/performance/coverage and other KPI metrics

Minimum Qualification:

• Bachelor's/Masters degree in Electronics and Communication Engineering/Computer Science or related field
• 2-5 years of working experience (Candidates with less experience with good academics from premier institutes can also be considered)

Mandatory Skills:

• Good knowledge and understanding of Embedded SW architecture and development in C, C++, Assembly
• C language expertise for low level programming, assembly language for any processor, C-assembly interworking
• Good knowledge of ARMv8/ARMv9/x86/PowerPC CPU architecture, Interrupt handling, Cache coherency, IO Coherency
• Good knowledge of SoC architecture having Multicore/Multiprocessor with SMP/heterogenous cores
• Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies/locking mechanism, Virtual memory/MMU/paging etc
• Understanding of memory management, weakly ordered memory model/pipelining of memory systems/memory barriers
• In-depth understanding of software build toolchains comprising of compilers, Makefiles, linker/scatter files
  • Compiler/Linker: Proficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM, Experience in optimizing code and resolving linker issues to ensure efficient and error free builds
  • Makefiles: Strong understanding of the makefile syntax and usage. Ability to create, modify and maintain Makefiles to automate the build process and manage dependencies effectively
• Experience in using JTAG interfaces and tools for debugging HW
• Scripting languages such as Python, shell scripting etc.

Desired Skills

• Exposure to SoC architecture paradigms interconnects, power management, emulation(pre-Si) environment
• Exposure to working on emulation/pre-si environment is added advantage
• Experience working with boot code for ARM processors
• Software development for silicon enablement, silicon validation
• Board Bring-up/Bring-up of hardware-software solution on FPGA/emulation platforms and on fresh SOC designs
• Exposure to build automation: Experience with build automations tools such as Jenkins and experience in creating automated build pipelines to stream line the development process
• Exposure to Regression testing: Understanding of the regression testing methodologies and tools. Ability to design, implement and execute comprehensive regression test suites to ensure software quality and stability
• Source code management: Proficient in source code management tools such as Perforce, Git, SVN. Experience in branching merging and resolving merge conflicts
• Code Reviews: Ability to conduct thorough and constructive code reviews to maintain code quality, ensure best practices and identify the areas of improvements