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Sr Verification Engineer
Proxelera
posted 3mon ago
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Fixed timing
Key skills for the job
Job Description
- At least 4 years of experience in complex IPs or SoCs.
- Good knowledge in SystemVerilog, UVM, C/C++ test writing
- Constrained random or directed testing experience in achieving functional and code coverage closure
- At least one project tape-out experience, preferably with exposure to functional issues from the field usage and replicating them in RTL testing
- Desirable to have experience in mentoring a couple of junior engineers
Employment Type: Full Time, Permanent
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Strict timing
Monday to Friday
No travel
Day Shift
Proxelera Benefits
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