LEAD/Senior ENG - FPGA Silicon Validation 6 To 15 yrs (Hyderabad)

Job Description

Senior Engineers/LEAD
Strong hands-on FPGA Silicon validation experience

Location - Hyderabad

EXp - 6 to 15 yrs

Strong hands-on validation experience in one or many of the below protocols

PCIe Gen4/5
DDR 4/5
100G/50G/40G/25G/10G Ethernet
USB 3.2
JESD204C
1588 PTP
MIPI
MACSEC
o Hands-on systems level design and debug experience with the following high-speed memory interfaces:
DDR4/LPDDR4/DDR5/LPDDR5 memories
QDR II+/ QDR IV memories
Good knowledge of embedded processors and peripherals such as SPI, I3C, UART, NOC, Trace and USB
Responsible for developing testbenches and verifying validation designs
Responsible for handling complex use cases on above protocols at block level and subsystem level
Strong hands-on experience in C programming language experience
Validating FPGA configuration and security features

• Team members
  Strong hands-on experience in validating design on FPGA at board level
  Strong hands-on design and validation experience in one or many of the below protocols
  AXI/AHB/APB
  SPI
  UART
  I3C/I2C
  USB
  Serdes based protocols
  Embedded Processor
  Memory interface
  Responsible for developing validation design in RTL and C and validating features on the FPGA
  Responsible for handling complex use cases on above protocols at block level and subsystem level
  The skillset required at the time of hiring may vary slightly from the above listed