Design Verification Engineer - SoC

Notice Period : Immediate to 90 days notice

We are seeking a talented and experienced Design Verification SOC Engineer to join our dynamic team in Bangalore. As a key member of our engineering group, you will play a crucial role in ensuring the quality and reliability of our complex System-on-Chip (SOC) designs.

Responsibilities :

- Develop and execute comprehensive verification plans and testbenches using SystemVerilog (SV) and Universal Verification Methodology (UVM).

- Collaborate with design teams to understand architectural specifications and requirements.

- Create and maintain detailed verification environments, including stimulus generation, response checking, and coverage analysis.

- Debug and troubleshoot complex design issues, working closely with design and verification teams to identify and resolve root causes.

- Contribute to the development of verification methodologies and best practices.

- Ensure adherence to project timelines and quality standards.

Qualifications :

- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

- 3-6 years of experience in SOC or IP verification using SV and UVM.

- Strong understanding of digital design principles and verification concepts.

- Excellent debugging and problem-solving skills.

- Proficiency in scripting languages (e.g., Python, Perl).

- Experience with low power verification, DFX, or PCIe is a plus.

- Strong communication and teamwork skills.