DFT Engineer - MSBIT (5-12 yrs)

Job requirements :

Technical Skills :

- 5-12 years of complete hands-on experience in - DFT Architecture, Design, Scan, MBIST, Gate Level simulations with Timing, DFT Constraints, Pattern Generation, and ATE support.

- Should be familiar with SoC & IP level DFT Architecture and Flows from RTL to production.

- Able to understand and implement requirements from Test engineering perspective

- Familiarity with either Synopsys or Tessent Scan flows.

- Simulation tools: NCSIM/XCELIUM/VCS

- Should have handled aspects of Scan - Scan Insertion, ATPG, Coverage improvement, Pattern Generation on their own. Familiarity with various test pattern formats - STIL, WGL, VEC formats.

- Experienced in defining DFT constraints, Timing Closure in DFT modes and handling Gate level simulations with timing at various corners.

- Able to implement ECO flows to resolve issues observed at NETLIST level.

- Experienced in MBIST flows - Insertion, Simulation and Pattern generation.

- The ability to deal with Mixed-Signal design test controllability and observability can be a major plus.

- Should be able to support ATE and HTOL teams for post-silicon debug support.

- Experience in Tcl/Tk, PERL, Makefile is a Plus

- Technologies: 28nm andbelow.

Education: B.Tech/BE/ME/M.Tech

Job requirements

Soft Skills :

Communication :

- Able to abstract technical details. Open to communicate with people on and off site. Open-minded.

- Excellent communication skills, enjoys working in an international team across locations

- Very good level of spoken and written English ( at least B2 level).

- Strong presentation and listening skills are required

Team player :

- Committed to the team and task

- Helping team members, sharing knowledge

Self-driven and highly motivated:

- Self-motivated and self-dependent worker. Embracing the task. Highlight potential issues

- Regular reporting. Clean and organized working style. Able to go the extra mile