Physical Design Engineer - RTL/GDS/Timing Closure (5-15 yrs)

Job requirements :

Technical Skills :

- Hands on experience, P&R from RTL to GDS including timing closure and Physical verification.

- Design experience in all aspects of physical design.

- Include all aspects of physical design including synthesis, floor planning, place and route ClockTreeSynthesis, ClockDistribution, extraction, Timingclosure, Power and Signal Integrity Analysis, Physical Verification, DFM and Tape Out.

- Expert knowledge of Synopsys IC-Compiler and proficient and powerful user of Synopsys ToolSuite (DC/ICC/Star/PT).

- Technologies: 28nm and below.

- Experience in Mentor Calibre tool storun Physical verification and/or in ANSYS Redhawk to run IR analysisis a Plus.

Education: B.Tech/BE/ME/M.Tech

Efficient communication skills to interface with Front End Design team to resolve Design Issues Experience in Tcl/Tk, PERL, Makefile is a Plus

Soft Skills :

- Communication : Able to abstract technical details.

- Open to communicate with people on and off site. Open minded.

- Excellent communication skills, enjoys working in an international team across locations

- Very good level of spoken and written English (atleastB2 level).

- Strong presentation and listening skills are required Team player

- Committed to the team and task

- Helping team members, sharing knowledge Self-driven and highly motivated

- Self-motivated and self-dependent worker. Embracing the task. Highlight potential issues

- Regular reporting. Clean and organized working style. Able to go the extra mile Solution oriented attitude, pragmatic. Good problem solving skills

- Following and improving processes

- Able to follow corporate reporting standards Organized, trusted, committed to along term employment

- Quality awareness