Physical Design Specialist - RTL/Perl (7-12 yrs)

Job Description :

We are looking for an experienced IR/PD Specialist to lead physical design activities at the Block/SOC level and implement ECOs. The ideal candidate will have expertise in PnR/APR flows, power integrity analysis using Redhawk and Voltus, and deep knowledge of physical design methodologies, including STA, DFM, and signoff.

Key Responsibilities :

- Execute PnR/APR flows, including placement, clock tree synthesis (CTS), routing, and optimization for performance, power, and area (PPA).

- Conduct power integrity analysis using tools like Redhawk and Voltus, focusing on IR drop and electromigration (EM) issues.

- Perform ECO implementation at the block and SOC levels to meet design specifications.

- Manage STA, DRC/LVS, Antenna, and ERC signoff requirements.

- Work on DFM (Design for Manufacturability) and ensure compliance with process design rules.

- Collaborate with cross-functional teams, including RTL, verification, and packaging teams, to ensure design closure.

- Utilize scripting languages like Perl and TCL for process automation and flow optimization.

- Leverage EDA tools like Synopsys ICC II, Cadence Innovus, and extraction tools for PD workflows.

- Debug and resolve design issues efficiently while adhering to project timelines.

Mandatory Skills :

- 10+ years of hands-on experience in Physical Design and IR analysis.

- Expertise in PnR/APR, Redhawk, Voltus, and power integrity methodologies.

- Strong understanding of timing closure, STA, DRC/LVS, and Antenna/ERC.

- Proficiency with EDA tools like Synopsys ICC II and Cadence Innovus.

- Skilled in scripting using Perl and TCL for tool automation.

- Deep understanding of block/SOC-level PD and ECO implementation processes.

- Strong problem-solving skills and ability to debug complex physical design challenges.

- Excellent communication and collaboration skills.

- Redhawk, Voltus,Placement, CTS, Routing, Extraction, DFM

- Block/SOC level PD,ECO implementation

- PnR / APR, STA, DRC/LVS/Antenna/ERC

- Perl, TCL . EDA Tools,PnR tools Synopsys ICC II/ Cadence Innovu

Nice to Have Skills :

- Experience with additional tools like Calibre, PrimeTime, or other signoff tools.

- Knowledge of advanced technology nodes (<5nm) and their unique challenges.

- Exposure to AI/ML-based optimizations in physical design flows.

- Familiarity with low-power design techniques and multi-die integration.

Education : Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Science, or a related field.

Benefits :

- Competitive salary and performance-based incentives.

- Opportunities to work on cutting-edge technology nodes and SOC-level designs.

- Professional growth and leadership opportunities.

- Flexible work environment and a culture of innovation.