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Principal Engineer SoC Design

10-14 years

Bangalore / Bengaluru

1 vacancy

Principal Engineer SoC Design

Infineon Technologies

posted 1d ago

Job Role Insights

Flexible timing

Job Description

Are you interested in complex technical topics and passionate about developing Digital Mixed Signal Microcontroller SoCsWould you enjoy being part of the #1 semiconductor company in the fast-changing automotive worldThen, we have the right challenge for you at Infineon s Design Center in India, Bangalore. Apply now to join us as a Principal Engineer SoC Design. With this position you will play as a technical lead : a special career path for those who share innovative ideas, demonstrate comprehensive technical knowledge, show thought leadership, possess problem solving abilities and are able to create business value.


In your new role you will:

  • You take on new challenges without knowing the right path to an eventual solution in advance. You cooperate across boundaries and appreciate the contributions of other people. You work conscientiously on making things better, faster, and more efficient.
  • A degree in Electrical Engineering, Microelectronics or a similar field.
  • At least 10 years of solid experience in SoC Physical Design - especially in Floorplanning of complex hierarchical FinFET SoC designs
  • Insights into technical leadership in physical design projects.
  • Sound programming skills and knowledge in scripting languages like Tcl, Perl or Python.
  • Solid experience in RTL coding.
  • Understanding of Functional Safety (optional)
  • Ability to quickly learn advanced design methodologies of complex SoCs.
  • Fluent English language skills - with German being an added plus
  • Be a team player while taking and acting on responsibilities.



You are best equipped for this task if you have:
  • Take over the technical leadership for designing highly complex SoC designs in a multi-site organization covering all aspects of Physical SoC Design.
  • Translate requirements into layout specifics using our state-of-the-art EDA tools and flows.
  • Work independently in different phases of the RTL2GDS flow: with focus on Synthesis, Equivalence check, timing constraints, Hierarchical Floorplanning, Placement, Clock Tree Synthesis, Routing and Power Mesh for efficient Timing Closure and Sign off including Signal Integrity and physical signoff including Power Integrity.
  • Work with industry standard tools for physical design and signoff with good understanding of scripting languages (shell, perl, tcl) and Make flow.
  • As a team player, collaborate well with stakeholders on project tasks along with desire to learn and explore.
  • Work on Padring Design, Bump planning, RDL routing, Esd Planning, Die size estimation Top level Floor planning.
  • With focus on PPA, define the Partition shapes, pins and feedthrough along with IP integration guidelines are followed (reviewed along with IP owners) to suit the requirements.
  • Drive Partition level PnR of multimillion instance designs with good command over congestion resolution, timing and clocktree debug for multi-power domain designs.
  • Drive the PnR closure of multimillion gate designs in lower technology nodes, perform SoC level IR/EM analysis, debugging and fixing.
  • Running SoC level Physical verification, debugging and fixing including Chip finishing, metal fill, Sealring and Tapeout checks
  • Good interaction skills with different stakeholders managing own deliveries and asks.
  • Take physical limitation of hierarchical deep sub-micron FinFET designs into account.
  • Tap your experience to contribute significantly to the hierarchical SoC architecture definition.
  • Define and drive PPA optimization across the stages: Synthesis, PnR, implementation of clocking architectures.
  • Be a member of an expert network and drive innovation, methodology and flow topics in your domain for next generation SoC Development.


#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in

We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity Inclusion at Infineon.


Employment Type: Full Time, Permanent

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Infineon Technologies Interview Questions & Tips

Prepare for Infineon Technologies Principal Engineer roles with real interview advice

Top Infineon Technologies Principal Engineer Interview Questions

Q1. Steps to find temperature of N rooms and display the same
Q2. Project Management Tools and techniques
Q3. How to implement sr flipflop using gates.
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What people at Infineon Technologies are saying

4.5
 Rating based on 4 Principal Engineer reviews

Likes

Good team culture

  • Job security - Excellent
  • +2 more
Dislikes

Compensation and benifits

Read 4 Principal Engineer reviews

Principal Engineer salary at Infineon Technologies

reported by 17 employees with 10-19 years exp.
₹23.6 L/yr - ₹85 L/yr
83% more than the average Principal Engineer Salary in India
View more details

What Infineon Technologies employees are saying about work life

based on 210 employees
86%
96%
69%
100%
Flexible timing
Monday to Friday
No travel
Day Shift
View more insights

Infineon Technologies Benefits

Cafeteria
Team Outings
Work From Home
Health Insurance
Free Food
Soft Skill Training +6 more
View more benefits

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