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98 Cisco Jobs
ASIC Engineering Technical Lead
17-20 years
₹ 26 - 50L/yr (AmbitionBox estimate)
This is an estimate of the average salary range for this
position. It has not been reviewed by the company, and
the actual salary may differ.
Bangalore / Bengaluru
1 vacancy
ASIC Engineering Technical Lead
Cisco
posted 2d ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs.
- Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL.
- Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
- Your team will participate in the creation of Innovative Hardware DFT physical design aspects for new silicon device models, bare die stacked die, driving re-usable test and debug strategies.
- The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship.
You are an ASIC Design for Test Hardware Engineer with 10+ years of related work experience with a broad mix of technologies.
Minimum Qualifications: - Bachelors or a Master s Degree in Electrical or Computer Engineering required with at least 10 years of experience.
- Knowledge of the latest innovative trends in DFT, test and silicon engineering.
- Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
- Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
Knowledge of the latest innovative trends in DFT, test and silicon engineering.
- Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
- Experience working with Gate level simulation, debugging with VCS and other simulators.
- Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687
- Strong verbal skills and ability to thrive in a multifaceted environment
- Scripting skills: Tcl, Python/Perl.
- Verilog design experience - developing custom DFT logic IP integration; familiarity with functional verification
- DFT CAD development - Test Architecture, Methodology and Infrastructure
- Test Static Timing Analysis
- Post silicon validation using DFT patterns
Employment Type: Full Time, Permanent
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What people at Cisco are saying
Rating based on 13 Technical Lead
reviews
Anonymous · Engineering - Hardware & Networks
in Bangalore / Bengaluru
Likes
Work life balance
- Salary - Good
+4 more
Dislikes
Sudden layoffs
Technical Lead salary at Cisco
reported by
353
employees
with 8-20
years exp.
₹20.7
L/yr - ₹65.5
L/yr
112%
more
than the average Technical Lead Salary in India
View more details
What Cisco employees are saying about work life
based on 1.8k employees
Flexible timing
Monday to Friday
No travel
Day Shift
Cisco Benefits
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