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Tejas Networks Fpga Design Engineer Interview Questions and Answers
Tejas Networks Fpga Design Engineer Interview Experiences
1 interview found
Selected
I applied via LinkedIn and was interviewed before Jun 2023. There were 2 interview rounds.
(1 Question)
- Q1. Design a counter
- Ans.
Design a counter using flip-flops to count up or down based on the input signal.
Use D flip-flops to store the count value
Connect the output of one flip-flop to the input of the next flip-flop to create a ripple effect
Use additional logic gates to control the direction of counting (up or down)
Implement a reset signal to initialize the counter to a specific value
(1 Question)
- Q1. Frequency divider
Skills evaluated in this interview
Top trending discussions
Interview questions from similar companies
(2 Questions)
- Q1. Basic verilog questions
- Q2. CDC related questions
Interview Preparation Tips
Embedded Developer Interview Questions & Answers
Sterlite Technologies
Anonymous
posted on 5 Sep 2024
(1 Question)
- Q1. Toughest time and how you handled
- Ans.
Dealing with a project deadline delay due to unexpected technical challenges
Identified root cause of the technical challenges
Collaborated with team members to brainstorm solutions
Adjusted project timeline and communicated with stakeholders
Worked extra hours to meet the revised deadline
Verification Engineer Interview Questions & Answers
Ribbon Communication
Anonymous
posted on 3 Mar 2024
Selected
I applied via Approached by Company and was interviewed before Mar 2023. There was 1 interview round.
Python and java related question
Interview Preparation Tips
Rupal Jain
(4 Questions)
- Q1. Asked about the details of my projects
- Q2. Digital question related to flip flop and mux.
- Q3. Assertion, constraint questions
- Q4. Asked about different ways of saving power
1hr interview, asked checker code, checked protocol knowledge mentioned in Resume, asked assertion.
(4 Questions)
- Q1. Draw Digital circuit question based on the waveform
- Q2. Asked about code coverage in details
- Q3. 1 technical puzzle, to print infinite series of a given pattern
- Q4. 1 logical puzzle, 50ball in box of 1 colour and 50ball of 2nd colour in another box, calculate highest probability to choose 1 colour ball.
Interview Preparation Tips
Online test core topics like vlsi,digital design etc
(3 Questions)
- Q1. Few digital electronics questions one puzzle one vlsi question
- Q2. Puzzle based on matricess
- Q3. Vlsi question based on stacks
(2 Questions)
- Q1. Basic verilog questions
- Q2. CDC related questions
Interview Preparation Tips
I applied via campus placement at Indian Institute of Technology (IIT), Kanpur and was interviewed in Nov 2023. There was 1 interview round.
(2 Questions)
- Q1. Going through resume and asking core related projects
- Q2. And 2 maths related questions from sets and logical queston
I applied via Recruitment Consulltant and was interviewed before Nov 2023. There was 1 interview round.
(2 Questions)
- Q1. Explain CGC cell working with circuit and waveforms
- Ans.
CGC cell is a standard cell used in physical design with specific characteristics for circuit implementation.
CGC cell stands for Custom Gate Cell, which is a standard cell used in physical design for implementing logic functions.
CGC cells have specific characteristics like fixed height and width, predefined power and ground connections, and a set of pins for input and output signals.
When designing a circuit using CGC c...
- Q2. Draw tie cell diagram for both low/high cells
- Ans.
Tie cell diagram for low/high cells in physical design engineering.
Tie cell diagram is used in physical design to connect multiple power domains.
Low tie cells are used to connect low power domains, while high tie cells are used for high power domains.
Examples of tie cells include power switches and isolation cells.
(1 Question)
- Q1. Implement memcpy in a robust way.
- Ans.
Use a loop to copy data byte by byte, handle overlapping memory regions, and check for NULL pointers.
Use a loop to copy data byte by byte
Handle overlapping memory regions by checking the direction of copy and copying in the correct order
Check for NULL pointers before performing any operations
Skills evaluated in this interview
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Tejas Networks Fpga Design Engineer Interview Process
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