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QSoCs VLSI Training Institute Asic Design Verification Engineer salaries in Bangalore / Bengaluru

Annual salary range
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₹2.7 Lakhs - ₹3.5 Lakhs
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Last Updated: 5 Mar 2023

Companies similar to QSoCs VLSI Training Institute for Asic Design Verification Engineer in Bangalore / Bengaluru

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QSoCs VLSI Training Institute Asic Design Verification Engineer Salary

Fresher (AmbitionBox Estimate)

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₹2.7 L/yr - ₹3.5 L/yr

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₹3 L/yr - ₹6 L/yr

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₹15.2 L/yr - ₹30.2 L/yr

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₹2.4 L/yr - ₹4 L/yr

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Asic Design Verification Engineer salary at QSoCs VLSI Training Institute ranges between ₹2.7 Lakhs to ₹3.5 Lakhs per year for employees with less than 1 year of experience. Salary estimates are based on 1 latest salaries received from various employees of QSoCs VLSI Training Institute.

Salary related reviews for QSoCs VLSI Training Institute

Engineering - Software & QA Department

4.0
  •  posted on 07 Dec 2020

4.0
 for  Salary and Benefits

Likes

...gement is transparent. There is a huge cafeteria and gaming arcade for chilling. Company policies are good, appraisals are fair and they give good salary hike and bonus every year.

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Dislikes

There is a lot of politics and the management doesn’t address our issues. Salary is decent but career growth is slow. There is a bond of 2 years before which you cannot resign. On the job training is not given to new joinees.

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QSoCs VLSI Training Institute Asic Design Verification Engineer salary in Bangalore / Bengaluru ranges between ₹2.7 Lakhs to ₹3.5 Lakhs. This is an estimate based on latest salaries received from employees of QSoCs VLSI Training Institute.