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PrimeSoc Technologies Design & Verification Engineer salaries in India

Annual salary range
1 - 2 years exp.
₹2.5 Lakhs - ₹3 Lakhs
Low Confidence
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Low confidence means that this average salary is based on data that was reported by very few people.
Salary of majority employees
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65% less than the average Design & Verification Engineer Salary for 1 - 2 years of experience

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Last Updated: 10 Oct 2024

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Design & Verification Engineer salary at PrimeSoc Technologies ranges between ₹2.5 Lakhs to ₹3 Lakhs per year for employees with experience between 1 year to 2 years. Salary estimates are based on 3 latest salaries received from various employees of PrimeSoc Technologies.

Latest annual salaries shared by PrimeSoc Technologies Design & Verification Engineer

3mo ago
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1 year exp.
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2 years exp.
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Experience wise PrimeSoc Technologies Design & Verification Engineer salaries

Last Updated: 10 Oct 2024

Experience Avg Annual Salary
1 year (AmbitionBox Estimate)

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₹2.5 L/yr - ₹3.2 L/yr
2 years (AmbitionBox Estimate)

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₹2.3 L/yr - ₹2.9 L/yr

Similar Designation salaries in PrimeSoc Technologies

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₹2.7 L/yr - ₹4.71 L/yr
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₹1.2 L/yr - ₹3 L/yr
RTL Design Engineer Salary
(AmbitionBox Estimate)
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₹2.7 L/yr - ₹3.5 L/yr

Salary related reviews for PrimeSoc Technologies

1.0

Rated by 1 employees for salary & benefits

Full Time

 · 

Other Department

1.0
  •  posted on 19 Jan 2025

1.0
 for  Salary and Benefits

Likes

Nothing is like. But it is open source code to edit.

Dislikes

... am to 10 pm working time. If you ask any question jebaselvi will terminate you. You have to work like slave, no respect, no increment, salary decution if worked upto 1 clock also. Simple jebaselvi say your perfomance is not good. How means you have implement test case, driver code, monitor code include complete all those things your performance is not good tell in final word and detection in your salary. Only three person get experience letter from 2019 company is there. If joined in this company life. Note: if I tell fake means you just contact one of worked emplyeee before worked those worst compnay primesoc

read more
  • Salary - Bad
  • +5 more

Full Time

 · 

Research & Development Department

1.0
  •  posted on 20 Dec 2023

1.0
 for  Salary and Benefits

Likes

No Words to say, they terminated me.

Dislikes

Here no one help to learn, no support, no guidance, no life life balance.They wont tell how to work but you have to work and complete the work. if you not complete work give me mental torture you. compare to market level salary level low but you have to work like 3 years experience person even as freshers. plese dont join waste career, finally they terimated thanking god

read more
  • Salary - Bad
  • +6 more
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PrimeSoc Technologies Design & Verification Engineer Salary FAQs

What is the notice period for Design & Verification Engineer at PrimeSoc Technologies?
According to AmbitionBox, 100% of the PrimeSoc Technologies Design & Verification Engineers reported a notice period of 15 days or less.This is based on 2 responses on AmbitionBox in last 2 years.

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PrimeSoc Technologies Design & Verification Engineer salary in India ranges between ₹2.5 Lakhs to ₹3 Lakhs with an average annual salary of ₹unlock blur. Salary estimates are based on 3 PrimeSoc Technologies latest salaries received from various employees of PrimeSoc Technologies.