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JGDTech

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4.5

based on 10 Reviews

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JGDTech Asic Design Verification Engineer salaries in India

Annual salary range
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₹5.9 Lakhs - ₹7.5 Lakhs
Low Confidence
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Low confidence means that this average salary is based on data that was reported by very few people.
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Last Updated: 5 Mar 2023

Companies similar to JGDTech for Asic Design Verification Engineer

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Asic Design Verification Engineer salary at JGDTech ranges between ₹5.9 Lakhs to ₹7.5 Lakhs per year for employees with less than 1 year of experience. Salary estimates are based on 1 latest salaries received from various employees of JGDTech.

Similar Designation salaries in JGDTech

Embedded System Developer Salary
(AmbitionBox Estimate)
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₹3.6 L/yr - ₹4.6 L/yr
Vlsi Design Engineer Salary
(AmbitionBox Estimate)
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₹4.3 L/yr - ₹5.5 L/yr
Asic Design Engineer Salary
(AmbitionBox Estimate)
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₹6.8 L/yr - ₹8.6 L/yr

Salary related reviews for JGDTech

Embedded System Developer in Mumbai

Engineering - Software & QA Department

3.0
  •  posted on 01 Aug 2020
4.0
 for  Salary and Benefits

Likes

Good to start your careers. Salary on time. ( Company used to Cut 10% of salary every month, deposit amount which will be paid after 1 year of completion.) After the contract with client company overs, you will be no useful (will be terminated if no other client available.)

read more
  • Salary - Good
    • +1 more

Dislikes

It is a service provider company. Does not discloses your contract duration(Directly Bomb is showered). No training, learning platform. Every day you will have work load which is not going to cover in official working hours, No Overtime Allowances.

read more
  • Skill development - Bad
    • +4 more

Engineer in Bangalore / Bengaluru

Information Technology Department

1.0
  •  posted on 25 Sep 2020
1.0
 for  Salary and Benefits

Likes

One fo the worst company I have ever seen in my IT career. HR team is very cunning team. Managment thinks only about there billings and they won't bother about employees job securit. Just they use like a tissue paper.

read more

Dislikes

Everything is worst in this company. It's not well organized dont join this organization if you are thinking to join.

  • Salary - Bad
    • +6 more
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2w
an architect
Help me choose New Regime or Old Regime for my salary revision
Hi I am working as a full stack Architect (14 yeo) and Following is my CTC. Please help me calculate in hand salary and choose New or OLD regime. I have been doing Old regime till last year with a salary of 48 CTC. Now post revision it increased to 56L CTC effective March 1st. My PF alone will cover 80C Also have additional 50000 contribution in NPS My HRA is around 25K per month (300000) Health insurance for family 28000 Mom's medical expense 30000 (No personal (Have medical complications) or corporate insurance unfortunately) I have a home loan however its under construction, so not eligible yet for tax benefits
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JGDTech Asic Design Verification Engineer Salary FAQs

How the salary growth look like for a Asic Design Verification Engineer at JGDTech in India?
The salary growth for a Asic Design Verification Engineer at JGDTech depends on factors such as experience, performance, and promotions. On average, a Asic Design Verification Engineer can expect the following growth trajectory at JGDTech:

Experience Average Salary Range
Fresher ₹5.9 Lakhs to ₹7.5 Lakhs per year
and so on.

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JGDTech Asic Design Verification Engineer salary in India ranges between ₹5.9 Lakhs to ₹7.5 Lakhs. This is an estimate based on latest salaries received from employees of JGDTech.