Senior Design Verification Engineer

Area of expertise: system verilog and UVM, OVM, CPU verification, IP and SOC level verification.

Positions: lead level Locations: Bangalore, Hyderabad.

Job description:

. BE/ B.Tech/ Master degree in Electrical Engineering or Computer Science

4+ years of experience in pre-silicon RTL Verification /IP Verification / SOC verification

Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM)

Domain expertise in one or more of the following areas.

1. System-on-a-chip verification with multiple CPUs and fixed function units with AXI or NOC interconnects

2. Verification of embedded CPUs such as ARM, Tensilica, MIPS CPUs and interconnect subsystem through C/Assembly language tests

3. Verification of industry standard serial interfaces such as MIPI, USB, PCIe using industry standard VIP components.

4. Ethernet Packet Processors, buffer managers, DMA engines etc....

5. PHY layer verification of serial interfaces such as Ethernet, PCIe, USB etc.

6. Solid Linux environment skills including the use of Perl, Python or TCL to write/debug CAD tool scripts.