Expertise in ASIC RTL design, understanding architecture and design planning. Expertise in synthesis/debugging, and timing closure. Expertise in working on PCIe, USB, Imaging IPs, UCIE, UFS and DDR Expertise in working on High speed interfaces or serdes Expertise in working on CDC, RDC, constraint development and synthesis Expertise in creating Micro-Architecture Specification. Expertise in Tcl and Perl scripting. Expertise in Power planning and implementation techniques. Expertise in reviewing Test plans from Verification team. Must be able to support Emulation and Firmware team in board bring up. Preferred resources with valid regional work permit who are willing to relocate immediately