Upload Button Icon Add office photos
Engaged Employer

i

This company page is being actively managed by Vhunt4u Team. If you also belong to the team, you can get access from here

Vhunt4u Verified Tick

Compare button icon Compare button icon Compare
-

No reviews yet

i

This rating is based on a small number of reviews, so it may not fully reflect the overall employee experience.
filter salaries All Filters

32 Vhunt4u Jobs

Memory Layout Design Engineer - Cadence Virtuoso

4-8 years

Bangalore / Bengaluru, Singapore

Memory Layout Design Engineer - Cadence Virtuoso

Vhunt4u

posted 15d ago

Job Description

Experience : 4 - 8 Years

Job Description :

We are seeking a highly skilled and motivated Memory Layout Design Engineer to join our offshore development teams . The ideal candidate will have expertise in advanced process nodes (TSMC 3nm & 5nm) and a strong background in layout design for memory technologies. This role involves working on cutting-edge designs for high-performance and low-power applications, contributing to the development of next-generation semiconductor solutions

Role & responsibilities :

1. Layout Design and Verification :

- Create detailed and optimized physical layouts for memory cells, arrays, and peripheral circuits using tools like Cadence Virtuoso or Synopsys Custom Compiler.

- Perform parasitic extraction and ensure compliance with DRC (Design Rule Check) and LVS (Layout Versus Schematic) rules.

2. Collaboration with Design Teams :

- Work closely with circuit designers to ensure the layout meets electrical and performance specifications, such as timing, power, and area (PPA).

- Provide feedback on circuit designs to improve layout efficiency.

3. Process Technology Expertise :

- Understand and implement layout requirements for advanced nodes (3nm, 5nm, 7nm), including FinFET architecture and challenges such as variability and manufacturability.

- Address process-dependent effects like electromigration (EM), IR drop, and self-heating.

4. Tool Proficiency :

- Utilize EDA tools for layout design, simulation, and verification, ensuring compliance with foundry-specific PDKs (Process Design Kits).

- Automate repetitive tasks and improve workflow efficiency using scripting (e.g., Python, SKILL).

5. Quality and Optimization :

- Optimize layouts for yield enhancement and manufacturing robustness.

- Perform debugging of silicon failures and identify layout-related issues.

NOTE : Preferred resources holding valid regional work permits only


Employment Type: Full Time, Permanent

Read full job description

Compare Vhunt4u with

Oracle

3.7
Compare

Fractal Analytics

4.0
Compare

Subex

3.5
Compare

Zeta

3.3
Compare

MathCo

3.0
Compare

Hughes Systique Corporation

3.9
Compare

Konica Minolta Business Solutions India Pvt. Ltd.

3.5
Compare

Innovatiview India Ltd

3.9
Compare

Sequretek It Solutions

4.2
Compare

Deutsche Telekom Digital Labs

3.8
Compare

MoEngage

4.0
Compare

SISA Information Security

2.9
Compare

CoinDCX

3.7
Compare

SoftDEL Systems

2.5
Compare

Exponentia.ai

4.6
Compare

Jio Haptik

3.4
Compare

Rigved Technologies

3.3
Compare

The Hi-tech Robotic Systemz

3.6
Compare

Seclore

4.0
Compare

Nsight Inc

2.9
Compare

Similar Jobs for you

Senior Layout Engineer at Synopsys (India) Private Limited

Noida

3-8 Yrs

₹ 12-16 LPA

Characterization Engineer at Coders Brain Technology Private Limited

5-9 Yrs

₹ 15-40 LPA

Analog Layout Design Engineer at Intel Technology India Pvt Ltd

Bangalore / Bengaluru

4-9 Yrs

₹ 14-19 LPA

Analog Layout Engineer at SILCOSYS Solutions Pvt. Ltd

Noida, Hyderabad / Secunderabad + 1

3-8 Yrs

₹ 5-12 LPA

Senior Engineer at Quest Global Technologies

Bangalore / Bengaluru

4-8 Yrs

₹ 7-11 LPA

Analog Layout Engineer at Juntran Technologies Pvt Ltd

3-5 Yrs

₹ 12-15 LPA

Analog Layout Engineer at Capgemini Technology Services India Limited

Hyderabad / Secunderabad

6-8 Yrs

₹ 8-10 LPA

Analog Layout Engineer at Capgemini Technology Services India Limited

Hyderabad / Secunderabad

4-6 Yrs

₹ 6-8 LPA

Engineer at Synopsys (India) Private Limited

Bangalore / Bengaluru

3-7 Yrs

₹ 11-15 LPA

Physical Design Engineer at Coders Brain Technology Private Limited

3-5 Yrs

₹ 15-37 LPA

Memory Layout Design Engineer - Cadence Virtuoso

4-8 Yrs

Bangalore / Bengaluru, Singapore

15d ago·via naukri.com

Analog Design Engineer - Power Management

4-9 Yrs

Kolkata, Bangalore / Bengaluru, United states (usa)

1d ago·via naukri.com

Analog Design Manager

9-13 Yrs

Hubli, Bangalore / Bengaluru, New York

2d ago·via naukri.com

Automotive Cyber Security Engineer

4-9 Yrs

Bangalore / Bengaluru, Germany, United states (usa) +1 more

2d ago·via naukri.com

SEMICONDUCTOR : Senior Engineer, Analog Design

5-10 Yrs

Kolkata, Hubli, Bangalore / Bengaluru

3d ago·via naukri.com

SEMICONDUCTOR : Manager, Analog Circuit Design

8-13 Yrs

Hubli, Bangalore / Bengaluru

3d ago·via naukri.com

Static Timing Analysis Engineer (Clock Domain Crossing)

5-7 Yrs

Bangalore / Bengaluru

3d ago·via naukri.com

Firmware Development Engineer - Power Management

3-8 Yrs

Bangalore / Bengaluru, New York

3d ago·via naukri.com

Firmware Development Engineer - Memory Management

3-8 Yrs

Bangalore / Bengaluru, Belgrade, Penang

4d ago·via naukri.com

Firmware Development Engineer - Power Management

3-8 Yrs

Bangalore / Bengaluru, Belgrade, New York

4d ago·via naukri.com
write
Share an Interview