PD CAD Engineer

Role & responsibilities

Job Title: PD CAD Engineer (Physical Design - EDA Automation) Location: Bangalore.

Job Overview: The PD CAD Engineer will be responsible for developing, maintaining, and optimizing physical design flows, working closely with the design and CAD teams. This role requires a deep understanding of EDA tools, physical design methodologies, and proficiency in scripting languages for automation. Familiarity with 3D IC design is a plus.

Key Responsibilities:

• Develop and support automated physical design (PD) CAD flows, including floorplanning, placement, and routing optimization.
• Customize and optimize physical design flows using industry-standard EDA tools (such as Synopsys ICC2, Cadence Innovus).
• Collaborate with the design and CAD teams to improve PD workflows, ensuring robust and efficient flow from RTL to GDSII.
• Implement automation scripts using TCL, Perl, and Python to improve flow reliability and reduce design cycle time.
• Perform tool evaluations and benchmarking to keep PD flows up-to-date with the latest EDA advancements.
• Provide documentation, training, and support to the design team on PD flows and methodologies.
• Analyze physical design metrics and optimize layouts to meet area, power, and performance (PPA) requirements across advanced technology nodes.

Qualifications:

• Bachelors or Master’s degree in Electrical Engineering, VLSI, or a related field.
• 5+ years of experience in physical design or CAD flow development for VLSI.
• Strong experience with EDA tools for physical design, including Synopsys ICC2, Cadence Innovus, or similar tools.
• Proficiency in scripting languages (TCL, Perl, Python) to create and enhance CAD automation scripts.
• Understanding of PD flows, including floorplanning, placement, clock tree synthesis (CTS), and routing.
• Familiarity with timing closure and DRC/LVS signoff methodologies.

Preferred Skills:

• Understanding of 3D IC design is a plus.
• Experience with multi-corner multi-mode (MCMM) analysis and optimization.
• Knowledge of advanced technology nodes ( sub 10nm) and challenges associated with physical design.
• Familiarity with low-power design technique

Preferred candidate profile

Perks and benefits