Senior Engineer - FPGA Design & Verification

Thales India Engineering Competency Center in Bangalore is seeking a Senior Engineer role. In this role you will be responsible for developing FPGA firmware, RTL design, testing in the virtual environment and in the target hardware for Defense and Military applications. You also perform trade analysis of different algorithms, design approaches, engineering simulations & modeling before finalizing the design.

Qualifications: B.Tech in Electronics & Communication or Electrical engineering or equivalent with 5 to 8 years of relevant experience.

Higher qualifications of Post-graduation and PhD are desirable. Working experience in Defense products development is desirable

Job Responsibilities:

• RTL Design, Implementation, Testing, Integration and delivery of FPGA based hardware systems for Defense Applications.
• Expertise in Requirements Capture, developing Design Specification, detailed design & other technical artefacts.
• Hands on VHDL language.
• Experience in implementing FPGA code on the target hardware & testing with other system components and software.
• Good Hands on Linting, Equivalence Checking & Clock Domain Crossing.
• Experience in any scripting language for automation (Perl/TCL/Python).
• Experience in developing test harnesses to verify developed items using self-checking test benches, BFMs, checkers/Monitors & Score boards using VHDL.
• Release of developed items in accordance with configuration control procedures.
• Provide progress/technical updates to the project manager.
• Provide project schedule estimates and technical risk identification.
• Contribute to peer design reviews (PDR, CDR, FDR)
• Good knowledge in DOORS (Requirement Management)
• Good Knowledge in DO-254.

Minimum Skills/Experience:

• Degree qualified in electrical/electronic engineering with minimum 5 years of experience in FPGA Design & Verification.
• Preferred candidate has experience in FPGA development for Defense/Avionics Applications.
• Experience in FPGA Implementation Tools (XILINX Vivado/ALTERA Libero SoC/NanoXplore Xmap, Xpython/Altera Quartus).
• Good Experience in Mentor Graphics tools (HDL Designer, Questasim, Quest CDC, and Formal Pro).
• Experience in handling Lab equipment (Logic Analyzer, Oscilloscope, Function Generators, JTAG, and In-circuit de-buggers).

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