Sykatiya Technologies - Physical Design Lead/Manager/Director - ASIC (15-25 yrs)

Roles and Responsibilities :

- Work experience with node 7nm or lower node designs with advanced low power techniques is must.

- Experience on ASIC Physical Design : Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure, Physical Verification are essential part of the job.

- Well versed with Cadence or Synopsys tools is important.

- Experience with Static Timing Analysis in Primetime or Primetime-SI is important.

- Hands-on experience in scripting languages such as PERL, TCL is important.

- Timing closure on high-speed interfaces is a plus.

- Knowledge on Full chip Physical Design is beneficial.

- Good ASIC fundamentals and problem-solving skills is preferred.

Mandatory Skills :

- Experience with 7nm node.

- Experience with Cadence Innovus