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Senior Member Technical Staff
Siemens
posted 1mon ago
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Flexible timing
Key skills for the job
Job Description
Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology.
Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesized design using Verilog/System Verilog.
Required Experience: - We seek a graduate with at 1-8 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college.
- We value your experience on the protocol e.g. PCIe, USB, Ethernet, AMBA in Design or Verification.
- Good understanding of IP Verification Methodologies, Verification procedures and practices are plus! Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc
- We value expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, as this will greatly contribute to the quality of our products.
- We expect candidates to be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes.
- We consider exposure to object-oriented programming languages like C++ an advantage, and experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. You need to engage with customers for Deployment and R&D assistance.
Employment Type: Full Time, Permanent
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What people at Siemens are saying
Senior Member of Technical Staff salary at Siemens
reported by
8
employees
with 2-4
years exp.
₹20
L/yr - ₹32
L/yr
7%
less
than the average Senior Member of Technical Staff Salary in India
View more details
What Siemens employees are saying about work life
based on 4.8k employees
Flexible timing
Monday to Friday
No travel
Day Shift
Siemens Benefits
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Flexible Work Options and Hybrid Work Models Employee Engagement Health & Wellness Career Development
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