Join the most cutting-edge and well-funded hardware startup in Silicon Valley as a SoC RTL Integration Engineer. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world
You will be responsible for integrating various internal/external IP into the SoC and providing high quality RTL net list to the Back End team. Be involved in all aspects of SOC uArch/RTL including verification, synthesis , low power , DFT etc. and get creative by defining new flows and methodologies
Responsibilities. Responsible for integrating various internal/external IP into the SoC
Implement design quality checks such as Lint , CDC/RDC and UPF
Test and debug of SoC features
Participate in synthesis , timing closure and silicon bringup
Scripting to automate flows
Requirements. Strong fundamentals in digital ASIC design; experience using SystemVerilog. Strong skills in various front end design tools and techniques such as logic equivalence, lint checks, clock and reset domain crossing and DFT
Experience designing with multiple power domains and writing UPF
Knowledge of SOC/CPU architecture. Familiarity with high performance and low power design techniques
Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated. Ability to work well in a team spread across multiple sites and be productive under aggressive schedules
Education And Experience. PhD, Masters Degree or Bachelors Degree in technical subject area