SENIOR DESIGN ENGINEER

Responsibilities will include, but are not limited to:

• You are in the Design and verification of NAND internal operations and qualification of Firmware through system Verilog assertion coding, simulation and debug.
• You Perform design verification processes of NAND Chips with modeling and simulation using industry standard simulators.
• You Contribute to the development of new product opportunities by assisting with the overall verification, design and optimization of Memory/Logic/Analog circuits.
• You actively contribute to Cross group communication to work towards standardization and group success.
• You Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality.
• You Drive innovation into the future Memory generations within a dynamic work environment.
• You will develop an Understanding of controller / processor architecture.
• Experience in in the use of scripting language, programming tools and environment is a plus.

Successful candidates must have:

Solid knowledge in Verilog language.

Solid digital logic fundamentals.

Basic understanding of analog circuits.

An understanding and knowledge with mixed-mode design and validation.

Through understanding of Design/Verification CAD tools such as ncsim, Design Compiler, Formality, PrimeTime, etc.

Knowledge of TCL or PERL.

Knowledge in non-volatile memory design (NAND in particular) is a strong plus.