RTL Engineer

We are looking for a talented and motivated RTL Developer with expertise in designing and implementing high-performance digital systems for Xilinx RFSoC, MPSoC, and individual SoC platforms. In this role, you will focus on creating optimized RTL solutions, integrating complex systems, and ensuring seamless hardware/software co-design. The ideal candidate will have a deep understanding of FPGA/SoC design, verification, and optimization, and will work with cutting-edge Xilinx technologies to develop solutions for applications in communications, embedded systems, and signal processing.

Key Responsibilities:

• RTL Design for RFSoC and MPSoC: Develop, implement, and optimize RTL code (VHDL/Verilog) for custom hardware systems using Xilinx RFSoC, MPSoC, and individual SoC architectures, incorporating both embedded processing cores (ARM, R5, etc.) and programmable logic.
• Signal Processing and DSP: Design and optimize signal processing algorithms using Xilinx DSP slices, programmable logic, and high-performance data paths, targeting real-time processing applications.
• SoC Integration: Interface RTL with embedded ARM cores, memory controllers, transceivers, and other system components, ensuring efficient communication between hardware and software.
• IP Utilization and Customization: Leverage and integrate existing Xilinx IP cores (memory, DSP, AXI, etc.) into custom designs to accelerate development and improve performance.
• Verification & Simulation: Develop testbenches and simulate RTL designs using tools like ModelSim, Vivado Simulator.
• Timing and Resource Optimization: Perform synthesis, static timing analysis, and place-and-route optimizations to ensure designs meet area, power, and timing constraints on Xilinx devices.
• System Design Flow: Manage the complete SoC design flow, including design entry, simulation, synthesis, routing, and timing closure, using Xilinx Vivado, Vitis, and other associated tools.
• Debugging and Troubleshooting: Identify and debug design issues across hardware and software, ensuring system-level performance, correctness, and stability.
• Collaboration: Work closely with cross-functional teams, including hardware, software, and verification engineers, to ensure seamless integration of RTL designs with embedded software and system components.

Required Skills and Qualifications:

• Proficient in RTL Design: Extensive experience in RTL design using VHDL or Verilog for Xilinx FPGA platforms, including RFSoC, MPSoC, and individual SoCs.
• Expertise in Xilinx Tools: Hands-on experience with Xilinx Vivado, Vitis, Vitis_HLS and other development tools for FPGA/SoC design, simulation, and debugging.
• Deep Knowledge of Xilinx RFSoC/MPSoC: Strong understanding of Xilinx RFSoC, MPSoC, and individual SoC architectures, including the integration of ARM cores, DSP blocks, memory controllers, and programmable logic.
• Signal Processing: Experience with high-performance signal processing design, including the use of Xilinx DSP slices, RF components, and other hardware accelerators.
• SoC Design Flow: Familiarity with the full FPGA/SoC design cycle, from RTL development to timing analysis and resource optimization.
• Problem-Solving & Debugging: Strong analytical and troubleshooting skills to resolve complex hardware/software integration issues.

Preferred Skills:

• Advanced Xilinx SoC Features:

1. Xilinx RFSoC and MPSoC

2. High-speed transceivers

3. Programmable logic fabric

4. Integrated RF capabilities.

• High-Speed Interfaces:

1. PCIe

2. Ethernet

3. JESD204

• Hardware-Software Co-Design: Understanding of the interaction between embedded software (e.g., ARM) and hardware (RTL) in SoC platforms.
• Scripting: Python, Verilog, HLS.

Working Environment:

• Work in a collaborative, fast-paced environment alongside a dynamic team of hardware and software engineers.
• Opportunities to work with cutting-edge technologies like advanced Xilinx platforms, including RFSoC, MPSoC, and custom SoC designs, solving challenging problems for communication systems, embedded solutions, and signal processing.