Staff Engineer

Hypervisor and Virtualization Engineer

In your new role you will:

• Responsible for designing the overall architecture and functionality of hypervisor, including architectural decision, resource management, Virtual Machine (VM) Life cycle management, security features and integration with hardware and software components.
• The technical lead should analyze and design efficient algorithms and optimize resource utilization to ensure optimal performance for hosted VMs and interaction between hypervisor and underlying hardware.
• Responsible for Requirements analysis, Unit design, Implementation, Integration, system debug, Verification, and delivery support.
• The technical lead should design and implement robust security features to ensure isolation between VMs, prevent VM escapes, and protect against unauthorized access.
• Ensure the quality and standard compliance such as ISO26262, ISO21434 etc.
• Identify and mitigate all the technical risk in area of responsibilities within the project scope.
• Contribution to the design and test methodology, automation, reuse of tests, quality improvements and engagement with tool partner
• Shall provide technical leadership, guidance, and mentorship to the team. The technical lead should communicate effectively, facilitate knowledge sharing, resolve technical challenges, and ensure alignment with project goals and timelines.
• Should actively research and evaluate emerging technologies, propose innovative solutions, and make informed design decisions to keep the hypervisor at the forefront of virtualization technology.

• Expert in low level programming such as Device Driver development and BSP porting using C/C++.
• In-depth knowledge of operating systems concepts and internals, such as process scheduling, memory management, file system etc.
• Good understanding of virtualization technologies including hardware virtualization. Familiarity with the hypervisor architectures like Type 1 (bare-metal) and Type 2 (hosted) hypervisors e.g., Xen on Arm, Green-hills microvisor, Open synergy and QNX etc.
• Working knowledge of device tree configuration, Linux device drivers, computer security principles, such as isolation, access control, secure bootstrapping etc.
• Understanding of network protocols and virtual networking technologies, network virtualization, VLANs, software-defined networking (SDN) etc., is nice to have.
• Expert knowledge of computer architecture, embedded CPU (ARM/RISC-V), virtual memory management, CPU virtualization features and interrupt handling management.
• Working knowledge of Citrix, Microsoft, VMware or any other open-source hypervisor is good to have.
• Hands-on experience on embedded compilers such as GNU, Tasking etc. and debuggers such as PLS, Lauterbach T32 etc.
• Good team player in a multi-site/multi-cultural work environment
Demonstrated strength of strong Communication skills, Innovation mindset, stakeholder management, risk management, quality, and process compliance, mentoring and coaching of peers etc

Driving decarbonization and digitalization. Together.

Infineon designs, develops, manufactures, and markets a broad range of semiconductors and semiconductor-based solutions, focusing on key markets in the automotive, industrial, and consumer sectors. Its products range from standard components to special components for digital, analog, and mixed-signal applications to customer-specific solutions together with the appropriate software.

We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity & Inclusion at Infineon.