As the Verification Lead for InCore, you will play a pivotal role in the development and validation of our cutting-edge semiconductor designs. You will lead a team of verification engineers, collaborating closely with design, architecture, and software teams to ensure the successful verification of complex integrated circuits. This role requires a deep understanding of verification methodologies, hands-on experience in ASIC/FPGA verification, and strong leadership skills.
KEY RESPONSIBILITIES
Lead and mentor a team of verification engineers, providing guidance and support throughout the verification lifecycle.
Develop and implement comprehensive verification strategies for InCore designs, including test plans, coverage analysis, and regression management.
Drive the adoption of advanced verification methodologies and best practices to improve efficiency and quality.
Collaborate with cross-functional teams to define verification requirements, review specifications, and resolve design issues.
Design and implement reusable verification components, test benches, and automation scripts to streamline verification processes.
Conduct thorough functional and performance verification of InCore designs, ensuring compliance with specifications and industry standards.
Manage verification schedules, resource allocation, and project priorities to meet development milestones and deliverables.
Stay updated on emerging technologies, tools, and methodologies in semiconductor design and verification, and integrate them into our workflows as appropriate.
Requirements
Bachelors/Masters degree in electrical engineering, Computer Engineering, or related field.
At least 5 years of experience in ASIC/FPGA verification
Deep understanding of verification methodologies, such as UVM, and proficiency in System Verilog.
Experience with industry-standard EDA tools for simulation, debug, and coverage analysis (e.g., Cadence, Synopsys, Mentor).
Strong problem-solving skills and attention to detail, with the ability to analyze complex designs and identify verification gaps.
Excellent communication and interpersonal skills, with the ability to collaborate effectively across teams and disciplines.
Leadership experience, including the ability to mentor junior engineers, drive consensus, and lead projects to successful completion.
BONUS SKILLS
Experience with core verification and micro-architecture verification.
Knowledge of RISC-V architecture and verification methodologies.
Familiarity with scripting languages (e.g., Python, Perl) and automation frameworks for verification.
Proficiency in GNU Toolchain (GCC, Binutils, GDB etc).
Benefits
Be a part of the India story and work with one of Indiafirst RISC-V CPU companies.
Early-stage startup fun:
Extremely high ownership and flexibility
No defined hierarchy! - Chart a plan and lead us forward
Interface with the founders on a daily basis
Own the entire verification vertical from start to finish