Design Verification Engineer - Analog Mixed Signal

Basic Requirement :

- Good understanding of electrical engineering and basic of digital logic concepts.

- Have hands-on exp on mix signal (AMS) verification with schematic/model/RTL combination of design.

- Actual project experience is recommended.

- Good analog behavioral modelling with Verilog AMS, Verilog A, Wreal etc.

- Good debug skill on analog design and simulation.

- Basic SV/UVM knowledge to have as the env is made of SV/UVM.

- Cadence simulator/tool exp is good to have.

- Basic scripting knowledge using shell/python/perl is recommended.

- Excellent debugging and problem-solving skill.

- Good communication, presentation skills and teamwork.

Primary Responsibilities :

- Responsible to develop detailed coverage driven Verification plan working closing with System and Application team and design team.

- Real time analog checkers and SV assertions experience is recommended.

- Supporting digital verification team by working closely with other verification team members, leads including outside services.

- Develop/Enhance SV/UVM based testbenches and tests and simulations at all phases (RTL, GLS),

- Understanding spec and coming up with testplan.

- Writing TB components, testcases, checkers, assertions, enhancing with randomization and coverage feedbacks.

- RTL and GLS regression and follow-up with tracking of the various activities. Run coverage and meet the defined coverage (coverage & functional) goals.

- Good interaction with Digital Design team, Firmware developers, Analog Designers, and rest of the team.

- Excellent teamwork, adapting to situations and ability to guide, help DV members Communication of DV status, issues, and concerns.

- Innovate & drive new and improved design verification methodologies where needed, work with the EDA team to upgrade tools and flows.

- Interacting with Test/Silicon Validation/Application Engineering team to ensure successful use of products and support customer applications debug/analysis.

- Identify and write all types of coverage measures for stimulus and corner-cases.

- Debug tests with design engineers to deliver functionally correct design blocks.

- Close coverage measures to identify verification holes and to show progress towards tape-out.