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82 Cadence Design Systems Jobs

Cadence Design Systems - Principal Design Engineer (7-9 yrs)

7-9 years

Cadence Design Systems - Principal Design Engineer (7-9 yrs)

Cadence Design Systems

posted 18hr ago

Job Role Insights

Flexible timing

Job Description

About the Job :

Cadence's IP Tensilica group is a leading provider of configurable embedded processor technology, with a growing focus on the Automotive Safety market.

We are seeking a Principal Design Engineer to join our Functional Safety Design Verification Team for Xtensa processors.

In this role, you will play a critical part in developing and verifying hardware and software safety mechanisms.

You will work on implementing simulation or emulation test benches, developing assembly/C language diagnostics, creating assertion checkers, and designing coverage monitors to meet stringent safety and verification goals.

Additionally, you will assist with fault simulation and coverage analysis.

Collaboration with RTL, EDA, and Functional Safety teams will be integral to this position.

Your responsibilities will also include developing and delivering functional safety work products and documentation necessary for product safety certification.

Key Responsibilities :

- Develop and verify hardware and software safety mechanisms for Xtensa processors.

- Implement simulation/emulation test benches and diagnostic tools using assembly/C languages.

- Create and maintain assertion checkers and functional coverage monitors.

- Conduct fault simulation and analyze coverage metrics.

- Collaborate with RTL, EDA, and Functional Safety teams to achieve product and safety goals.

- Prepare functional safety work products, including documentation for safety certifications.

Required Skills and Experience :

Experience : 7+ years of design verification experience, including team leadership.

Education : Bachelor's or higher degree in Electrical/Computer Engineering.

Technical Proficiency :

- Deep understanding of computer architecture, micro-architecture, and design verification fundamentals.

- Expertise in Verilog, SystemVerilog assertions, and functional coverage methodologies.

- Proficiency with popular EDA simulation tools.

- Strong coding skills in C and assembly language.

- Solid scripting experience using Perl, Unix shell, or similar languages.

- Familiarity with ISO 26262 standards and technical safety concepts.

- Experience with MISRA coding guidelines.

- Exposure to fault simulation tools and methodologies.

- Hands-on experience in debugging netlist/gate-level simulations.

Preferred Qualifications :

- Proven ability to lead and mentor small teams.

- Experience in developing functional safety documentation for certification processes.

- A proactive approach to problem-solving and cross-functional collaboration


Functional Areas: R&D

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What people at Cadence Design Systems are saying

4.6
 Rating based on 2 Principal Design Engineer reviews

Likes

Good work life balance

  • Skill development - Excellent
    +5 more
Dislikes

No stock options every year like Broadcom

    Read 2 Principal Design Engineer reviews

    Principal Design Engineer salary at Cadence Design Systems

    reported by 14 employees with 8-12 years exp.
    ₹27 L/yr - ₹54 L/yr
    64% more than the average Principal Design Engineer Salary in India
    View more details

    What Cadence Design Systems employees are saying about work life

    based on 264 employees
    87%
    90%
    73%
    90%
    Flexible timing
    Monday to Friday
    No travel
    Day Shift
    View more insights

    Cadence Design Systems Benefits

    Cafeteria
    Work From Home
    Health Insurance
    Team Outings
    Gymnasium
    Soft Skill Training +6 more
    View more benefits

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