VLSI Physical Design Engineer

Develop or enhance timing related scripts for clock skew analysis, critical path analysis, various IO interfaces, constraints partitioning/budgeting (from chip level to block level)
Active participation in post silicon validation, correlation and test activities using in-house test and validation lab
Effectively lead highly energetic and intellectual team members through coaching and mentoring, provide technical direction for career planning, engage them on project issues, and manage change
Prefer sound knowledge in EDA tools such as DC, ICC2, Cadence Innovus, STAR-RC, PT-SI, Quartz, Calibre, internal tools & flow
Perform custom RF Physical Design, including block-level and top level layouts, floorplanning, package routing
Supports complex projects or leads smaller independent design activities
Support CAD and drawing updates on both sustaining/new project with minimal supervision
Contributes to PD architecture/Plug-In Unit at the unit level