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66 Analog Devices Jobs

Principal Engineer, Design Verification Engineering

12-13 years

Bangalore / Bengaluru

1 vacancy

Principal Engineer, Design Verification Engineering

Analog Devices

posted 5mon ago

Job Role Insights

Flexible timing

Job Description

  • SOC Verification lead for complex digital SOCs - End to End SOC verification responsibility.
  • Verification of complex microprocessor designs, neural nets and high-speed peripherals using leading edge verification methodologies.
  • Define tasks for team members, coordinate team effort, track, guide, mentor and technical support to team.
  • Work with design and architecture team to define requirements, coordinate for verification deliverables and receivables.
  • Work with Emulation, System FPGA and Software teams to define post silicon validation requirements and intercept all post silicon requirements in pre-Silicon verification.
  • Identify, code, and validate end to end system use case scenarios.
  • UVM testbench architecture development and implementation of DV flows, methodology
  • Defining test plans, tests and verification methodology for block / subsystem and chip-level verification. Working with the design team in generating and reviewing test plans and closure of code and functional coverage
  • Working with other verification team disciplines like emulation, FPGA and Firmware teams to determine correct functionality.
  • Formal verification of IP s and Subsystems
  • NOC, Interconnect verification
  • Performance verification and Performance analysis of complex SOCs end to end scenarios.
  • System level use case scenarios definition, coding, and verification
  • Innovating verification solutions to hit deliverable schedules.
  • The chance to be exposed to and learn state of the art verification techniques such as formal, emulation, portable stimulus, and virtual platforms.
  • Come up with verification strategy for a product after going through product requirements and design specifications.
Requirements
  • B.Tech/M.Tech with 12+ years of industry experience in Digital Pre-Silicon verification. Experience in leading IP, Subsystem or SOC level verification,
  • Good understanding of SOC/Subsystem design concepts and design architectures.
  • Hands on experience in developing, updating and debugging of Verilog, SV-UVM, SOC level testbenches is a must.
  • Experience in closing the verification of block, subsystem level verification using industry standard metrics like code and functional coverage is a must.
  • Expertise on NOC, Bus, and Interconnect Verification. Coverage Analysis and improvements
  • Test Bench, TB, environment, architect and implement verification flow and methodology.
  • Power aware verification with UPF, Power analysis and Power optimization
  • Formal verification, define formal verification flow, connectivity and functional verification using formal tools.
  • Gate level Simulation with timing annotated
  • Strong knowledge of test-plan generation, coverage analysis transaction level modeling, pseudo and constrained random techniques with System Verilog
  • In-depth knowledge of SV-UVM and debugging of testbenches is a must.
  • Assertion and formal knowledge are an advantage.
  • Knowledge of microprocessor cores such as ARM, RISC-V, Tensilica, Neural Network, GPU Cores is a plus.
  • System Verilog, C/C++, System C, TCL/Python/shell-scripting
  • Experience in analog and mixed signal verification (ADC/DAC/PLL/Sensors/PHY) is an added advantage.
  • Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe.
  • Quick to adopt new technologies with good problem-solving skills.

Employment Type: Full Time, Permanent

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People are getting interviews at Analog Devices through

(based on 11 Analog Devices interviews)
Campus Placement
Job Portal
Referral
Company Website
37%
27%
18%
9%
9% candidates got the interview through other sources.
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What people at Analog Devices are saying

5.0
 Rating based on 1 Design & Verification Engineer review

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Nice work culture

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Design & Verification Engineer salary at Analog Devices

reported by 16 employees
₹12 L/yr - ₹35 L/yr
155% more than the average Design & Verification Engineer Salary in India
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What Analog Devices employees are saying about work life

based on 87 employees
92%
89%
77%
67%
Flexible timing
Monday to Friday
No travel
Day Shift
View more insights

Analog Devices Benefits

Cafeteria
Work From Home
Gymnasium
Education Assistance
Soft Skill Training
Health Insurance +6 more
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