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I applied via Walk-in and was interviewed in Jul 2021. There were 4 interview rounds.
Top trending discussions
I applied via campus placement at National Institute of Technology, Agartala and was interviewed in May 2024. There were 2 interview rounds.
Consist of coding , digital, mpmc.
I applied via campus placement at Indian Institute of Information Technology (IIIT), Sri City and was interviewed in Sep 2023. There were 2 interview rounds.
Ist round u have to attempt a OA which includes aptitude , logical reasoning and ece related circuit diagram outputs (analog and digital circuit designs)
I applied via Company Website and was interviewed in Jan 2024. There were 2 interview rounds.
Hardware related questions from digital electronics, vLSi design, C coding, Aptitude
Advanced questions of digital electronics, vlsi design, c coding, aptitude
Contains cognitive and logical reasoning questions
I applied via campus placement at National Institute of Technology (NIT), Kurukshetra and was interviewed before Aug 2021. There were 2 interview rounds.
Prepare aptitude, digital, digital IC design concepts well
To determine maximum frequency of operation from a complex diagram
Identify the critical path in the diagram
Calculate the propagation delay of each component in the path
Use the formula fmax = 1 / (2 * propagation delay) to determine maximum frequency
Consider any setup or hold time requirements for flip-flops or other components
Ensure that the frequency is within the specifications of the components used
The minimum size of buffer depends on burst rate, input/output stream rates, and latency rate.
Calculate the maximum amount of data that can be received during the latency period
Determine the maximum burst rate and the maximum input/output stream rates
Calculate the buffer size using the formula: buffer size = (maximum burst rate * latency period) + maximum input/output stream rates
Consider adding extra buffer space for
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Indus Towers
Nvidia
Juniper Networks
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